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C/C++ Source or Header  |  2000-05-04  |  80KB  |  2,665 lines
  1. /*************************************************************************
  2.  
  3.  Driver for Williams/Midway games using the TMS34010 processor
  4.  
  5. **************************************************************************/
  6. #include "driver.h"
  7. #include "cpu/tms34010/tms34010.h"
  8. #include "cpu/m6809/m6809.h"
  9. #include "6821pia.h"
  10. #include "sndhrdw/williams.h"
  11.  
  12.  
  13. #define FAST_DMA            1
  14.  
  15.  
  16. #ifdef LSB_FIRST
  17.     #define BYTE_XOR_LE(a)  (a)
  18.     #define BIG_DWORD_LE(x) (x)
  19. #else
  20.     #define BYTE_XOR_LE(a)  ((UINT8*)((UINT32)(a) ^ 1))
  21.     #define BIG_DWORD_LE(x) (((UINT32)(x) >> 16) + ((x) << 16))
  22. #endif
  23.  
  24.  
  25. #define CODE_ROM     cpu_bankbase[1]
  26. #define GFX_ROM         cpu_bankbase[8]
  27. #define SCRATCH_RAM     cpu_bankbase[2]
  28.  
  29. static WRITE_HANDLER( narc_sound_w );
  30. static WRITE_HANDLER( adpcm_sound_w );
  31. static WRITE_HANDLER( cvsd_sound_w );
  32.  
  33. WRITE_HANDLER( wms_vram_w );
  34. WRITE_HANDLER( wms_objpalram_w );
  35. READ_HANDLER( wms_vram_r );
  36. READ_HANDLER( wms_objpalram_r );
  37. void wms_update_partial(int scanline);
  38.  
  39. static UINT8 *gfxrombackup;
  40.  
  41. extern UINT16 *wms_videoram;
  42.  
  43.        UINT8 *wms_cmos_ram;
  44.        size_t wms_bank2_size;
  45. extern INT32  wms_videoram_size;
  46.        size_t wms_code_rom_size;
  47.        size_t wms_gfx_rom_size;
  48.        UINT8  wms_rom_loaded;
  49. static UINT32 wms_cmos_page = 0;
  50.        INT32  wms_objpalram_select = 0;
  51.        UINT8  wms_autoerase_enable = 0;
  52.        UINT8  wms_autoerase_reset = 0;
  53.  
  54. static UINT32 wms_dma_rows=0;
  55. static INT32  wms_dma_write_rows=0;
  56. static UINT32 wms_dma_cols=0;
  57. static UINT32 wms_dma_bank=0;
  58. static UINT32 wms_dma_subbank=0;
  59. static UINT32 wms_dma_x=0;
  60. static UINT32 wms_dma_y=0;
  61.        UINT32 wms_dma_pal=0;
  62.        UINT32 wms_dma_pal_word=0;
  63. static UINT32 wms_dma_dst=0;
  64. static UINT32 wms_dma_stat=0;
  65. static UINT32 wms_dma_fgcol=0;
  66. static INT16  wms_dma_woffset=0;
  67.  
  68. static UINT16 wms_dma_preskip=0;
  69. static UINT16 wms_dma_postskip=0;
  70.  
  71. static UINT32 wms_dma_temp=0;
  72.  
  73. static UINT32 wms_dma_8pos=0;  /* are we not on a byte boundary? */
  74. static UINT32 wms_dma_preclip=0;
  75. static UINT32 wms_dma_postclip=0;
  76.  
  77. static UINT16 wms_unk1=0;
  78. static UINT16 wms_unk2=0;
  79. static UINT16 wms_sysreg2=0;
  80.  
  81. static UINT32 wms_dma_14=0;
  82. static UINT32 wms_dma_16=0;
  83. static UINT32 wms_dma_tclip=0;
  84. static UINT32 wms_dma_bclip=0;
  85. static UINT32 wms_dma_1c=0;
  86. static UINT32 wms_dma_1e=0;
  87.  
  88. static UINT32 smashtv_cmos_w_enable=1;
  89.  
  90. static UINT32 wms_protect_s=0xffffffff; /* never gets here */
  91. static UINT32 wms_protect_d=0xffffffff;
  92.  
  93. static UINT32 term2_analog_select = 0;
  94.  
  95. static READ_HANDLER( narc_input_r )
  96. {
  97.     int ans = 0xffff;
  98.     switch (offset)
  99.     {
  100.     case 0:
  101.         ans = (input_port_1_r (offset) << 8) + (input_port_0_r (offset));
  102.         break;
  103.     case 2:
  104.         ans = (input_port_3_r (offset) << 8) + (input_port_2_r (offset));
  105.         break;
  106.     case 4:
  107.         ans = (input_port_5_r (offset) << 8) + (soundlatch3_r (0));
  108.         break;
  109. /*    case 6: */
  110. /*        ans = (input_port_7_r (offset) << 8) + (input_port_6_r (offset)); */
  111. /*        break; */
  112. /*    case 8: */
  113. /*        ans = (input_port_9_r (offset) << 8) + (input_port_8_r (offset)); */
  114. /*        break; */
  115.     default:
  116.         logerror("CPU #0 PC %08x: warning - read from unmapped bit address %x\n", cpu_get_pc(), (offset<<3));
  117.     }
  118.     return ans;
  119. }
  120. READ_HANDLER( wms_input_r )
  121. {
  122.     int ans = 0xffff;
  123.     switch (offset)
  124.     {
  125.     case 0:
  126.         ans = (input_port_1_r (offset) << 8) + (input_port_0_r (offset));
  127.         break;
  128.     case 2:
  129.         ans = (input_port_3_r (offset) << 8) + (input_port_2_r (offset));
  130.         break;
  131.     case 4:
  132.         ans = (input_port_5_r (offset) << 8) + (input_port_4_r (offset));
  133.         break;
  134.     case 6:
  135.         ans = (input_port_7_r (offset) << 8) + (input_port_6_r (offset));
  136.         break;
  137.     case 8:
  138.         ans = (input_port_9_r (offset) << 8) + (input_port_8_r (offset));
  139.         break;
  140.     default:
  141.         logerror("CPU #0 PC %08x: warning - read from unmapped bit address %x\n", cpu_get_pc(), (offset<<3));
  142.     }
  143.     return ans;
  144. }
  145. static READ_HANDLER( term2_input_r )
  146. {
  147.     int ans = 0xffff;
  148.     switch (offset)
  149.     {
  150.     case 0:
  151.         ans = (input_port_1_r (offset) << 8) + (input_port_0_r (offset));
  152.         break;
  153.     case 2:
  154.         ans = (input_port_3_r (offset) << 8) + (input_port_2_r (offset));
  155.         break;
  156.     case 4:
  157.         ans = (input_port_5_r (offset) << 8);
  158.         switch (term2_analog_select)
  159.         {
  160.         case 0:  ans |= input_port_4_r  (offset);  break;
  161.         case 1:  ans |= input_port_10_r (offset);  break;
  162.         case 2:  ans |= input_port_11_r (offset);  break;
  163.         case 3:  ans |= input_port_12_r (offset);  break;
  164.         }
  165.         break;
  166.     case 6:
  167.         ans = (input_port_7_r (offset) << 8) + (input_port_6_r (offset));
  168.         break;
  169.     case 8:
  170.         ans = (input_port_9_r (offset) << 8) + (input_port_8_r (offset));
  171.         break;
  172.     default:
  173.         logerror("CPU #0 PC %08x: warning - read from unmapped bit address %x\n", cpu_get_pc(), (offset<<3));
  174.     }
  175.     return ans;
  176. }
  177.  
  178. static READ_HANDLER( term2_input_lo_r )
  179. {
  180.     int ans = 0xffff;
  181.     switch (offset)
  182.     {
  183. /*    case 0: */
  184. /*        ans = (input_port_5_r (offset) << 8) + (input_port_4_r (offset)); */
  185. /*        break; */
  186. /*    case 2: */
  187. /*        ans = (input_port_7_r (offset) << 8) + (input_port_6_r (offset)); */
  188. /*        break; */
  189. /*    case 4: */
  190. /*        ans = (input_port_9_r (offset) << 8) + (input_port_8_r (offset)); */
  191. /*        break; */
  192.     default:
  193.         logerror("CPU #0 PC %08x: warning - read from unmapped bit address %x\n", cpu_get_pc(), (offset<<3));
  194.     }
  195.     return ans;
  196. }
  197.  
  198. static WRITE_HANDLER( term2_sound_w )
  199. {
  200.     if (offset == 0)
  201.     {
  202.         term2_analog_select = (data >> 0x0c) & 0x03;
  203.     }
  204.  
  205.     adpcm_sound_w(offset, data);
  206. }
  207.  
  208. static int irq_callback(int irqline)
  209. {
  210.     tms34010_set_irq_line(0, CLEAR_LINE);
  211.     return 0;
  212. }
  213.  
  214. static void dma_callback(int is_in_34010_context)
  215. {
  216.     wms_dma_stat = 0; /* tell the cpu we're done */
  217.     if (is_in_34010_context)
  218.     {
  219.         tms34010_set_irq_callback(irq_callback);
  220.         tms34010_set_irq_line(0, ASSERT_LINE);
  221.     }
  222.     else
  223.         cpu_cause_interrupt(0,TMS34010_INT1);
  224. }
  225.  
  226. static void dma2_callback(int is_in_34010_context)
  227. {
  228.     wms_dma_stat = 0; /* tell the cpu we're done */
  229.     if (is_in_34010_context)
  230.     {
  231.         tms34010_set_irq_callback(irq_callback);
  232.         tms34010_set_irq_line(0, ASSERT_LINE);
  233.     }
  234.     else
  235.         cpu_cause_interrupt(0,TMS34010_INT1);
  236. }
  237.  
  238. READ_HANDLER( wms_dma_r )
  239. {
  240.     if (wms_dma_stat&0x8000)
  241.     {
  242.         switch (cpu_get_pc())
  243.         {
  244.         case 0xfff7aa20: /* narc */
  245.         case 0xffe1c970: /* trog */
  246.         case 0xffe1c9a0: /* trog3 */
  247.         case 0xffe1d4a0: /* trogp */
  248.         case 0xffe07690: /* smashtv */
  249.         case 0xffe00450: /* hiimpact */
  250.         case 0xffe14930: /* strkforc */
  251.         case 0xffe02c20: /* strkforc */
  252.         case 0xffc79890: /* mk */
  253.         case 0xffc7a5a0: /* mk */
  254.         case 0xffc063b0: /* term2 */
  255.         case 0xffc00720: /* term2 */
  256.         case 0xffc07a60: /* totcarn/totcarnp */
  257.         case 0xff805200: /* mk2 */
  258.         case 0xff8044e0: /* mk2 */
  259.         case 0xff82e200: /* nbajam */
  260.             cpu_spinuntil_int();
  261.             wms_dma_stat=0;
  262.         break;
  263.  
  264.         default:
  265. /*            logerror("CPU #0 PC %08x: read hi dma\n", cpu_get_pc()); */
  266.             break;
  267.         }
  268.     }
  269.     return wms_dma_stat;
  270. }
  271.  
  272.  
  273. /*****************************************************************************************
  274.  *                                                                                         *
  275.  *               They may not be optimal for other compilers. If you change anything, make *
  276.  *             sure you test it on a Pentium II. Even a trivial change can make a huge   *
  277.  *             difference!                                                                 *
  278.  *                                                                                         *
  279.  *****************************************************************************************/
  280.  
  281. #define DMA_DRAW_NONZERO_BYTES(data,advance)            \
  282.     if (write_cols >= 0)                                \
  283.     {                                                    \
  284.         pal = wms_dma_pal;                                \
  285.         line_skip = 511 - write_cols;                     \
  286.         wrva = &(wms_videoram[wms_dma_dst]);            \
  287.         for (i=wms_dma_write_rows;i;i--)                \
  288.         {                                                \
  289.             j=write_cols;                                \
  290.             do                                            \
  291.             {                                            \
  292.                 if ((write_data = *BYTE_XOR_LE(rda)))    \
  293.                 {                                        \
  294.                     *wrva = pal | (data);                \
  295.                 }                                        \
  296.                 rda##advance;                            \
  297.                 wrva++;                                    \
  298.             }                                            \
  299.             while (j--);                                 \
  300.             rda+=dma_skip;                                \
  301.             wrva+=line_skip;                            \
  302.         }                                                \
  303.     }
  304.  
  305. #define DMA_DRAW_ALL_BYTES(data)                        \
  306.     if (write_cols >= 0)                                \
  307.     {                                                    \
  308.         pal = wms_dma_pal;                                \
  309.         line_skip = 511 - write_cols;                    \
  310.         wrva = &(wms_videoram[wms_dma_dst]);            \
  311.         for (i=wms_dma_write_rows;i;i--)                \
  312.         {                                                \
  313.             j=write_cols;                                \
  314.             do                                            \
  315.             {                                            \
  316.                 *(wrva++) = pal | (data);                \
  317.             }                                            \
  318.             while (j--);                                \
  319.             rda+=dma_skip;                                \
  320.             wrva+=line_skip;                            \
  321.         }                                                \
  322.     }
  323.  
  324. WRITE_HANDLER( wms_dma_w )
  325. {
  326.     UINT32 i, j, pal, write_data, line_skip, dma_skip=0;
  327.     int write_cols;
  328.     UINT8 *rda;
  329.     UINT16 *wrva;
  330.  
  331.     switch (offset)
  332.     {
  333.     case 0:
  334.         write_cols = (wms_dma_cols+wms_dma_x<512?wms_dma_cols:512-wms_dma_x)-1;  /* Note the -1 */
  335.         wms_dma_write_rows = (wms_dma_rows+wms_dma_y<512?wms_dma_rows:512-wms_dma_y);
  336.         wms_dma_dst = ((wms_dma_y<<9) + (wms_dma_x)); /* byte addr */
  337.         rda = &(GFX_ROM[wms_dma_bank+wms_dma_subbank]);
  338.         wms_dma_stat = data;
  339.  
  340.         logerror("\nCPU #0 PC %08x: DMA command %04x:\n",cpu_get_pc(), data);
  341.         logerror("%04x %04x x%04x y%04x  c%04x r%04x p%04x c%04x\n",wms_dma_subbank, wms_dma_bank, wms_dma_x, wms_dma_y, wms_dma_cols, wms_dma_rows, wms_dma_pal, wms_dma_fgcol );
  342.         /*
  343.          * DMA registers
  344.          * ------------------
  345.          *
  346.          *  Register | Bit              | Use
  347.          * ----------+-FEDCBA9876543210-+------------
  348.          *     0     | x--------------- | trigger write (or clear if zero)
  349.          *           | ---184-1-------- | unknown
  350.          *           | ----------x----- | flip y
  351.          *           | -----------x---- | flip x
  352.          *           | ------------x--- | blit nonzero pixels as color
  353.          *           | -------------x-- | blit zero pixels as color
  354.          *           | --------------x- | blit nonzero pixels
  355.          *           | ---------------x | blit zero pixels
  356.          *     1     | xxxxxxxxxxxxxxxx | width offset
  357.          *     2     | xxxxxxxxxxxxxxxx | source address low word
  358.          *     3     | xxxxxxxxxxxxxxxx | source address high word
  359.          *     4     | xxxxxxxxxxxxxxxx | detination x
  360.          *     5     | xxxxxxxxxxxxxxxx | destination y
  361.          *     6     | xxxxxxxxxxxxxxxx | image columns
  362.          *     7     | xxxxxxxxxxxxxxxx | image rows
  363.          *     8     | xxxxxxxxxxxxxxxx | palette
  364.          *     9     | xxxxxxxxxxxxxxxx | color
  365.          */
  366.         switch(data&0x803f)
  367.         {
  368.         case 0x0000: /* clear registers */
  369.             dma_skip=0;
  370.             wms_dma_cols=0;
  371.             wms_dma_rows=0;
  372.             wms_dma_pal=0;
  373.             wms_dma_fgcol=0;
  374.             break;
  375.         case 0x8000: /* draw nothing */
  376.             break;
  377.         case 0x8002: /* draw only nonzero pixels */
  378.             dma_skip = ((wms_dma_cols + wms_dma_woffset+3)&(~3)) - wms_dma_cols;
  379.             DMA_DRAW_NONZERO_BYTES(write_data,++);
  380.             break;
  381.         case 0x8003: /* draw all pixels */
  382.             dma_skip = ((wms_dma_cols + wms_dma_woffset+3)&(~3)) - wms_dma_cols;
  383.             DMA_DRAW_ALL_BYTES(*BYTE_XOR_LE(rda++));
  384.             break;
  385.         case 0x8006: /* draw nonzero pixels, zero as color */
  386.             dma_skip = ((wms_dma_cols + wms_dma_woffset+3)&(~3)) - wms_dma_cols;
  387.             DMA_DRAW_ALL_BYTES((*BYTE_XOR_LE(rda++)?*BYTE_XOR_LE(rda-1):wms_dma_fgcol));
  388.             break;
  389.         case 0x800a: /* ????? */
  390.         case 0x8008: /* draw nonzero pixels as color */
  391.             dma_skip = ((wms_dma_cols + wms_dma_woffset+3)&(~3)) - wms_dma_cols;
  392.             DMA_DRAW_NONZERO_BYTES(wms_dma_fgcol,++);
  393.             break;
  394.         case 0x8009: /* draw nonzero pixels as color, zero as zero */
  395.             dma_skip = ((wms_dma_cols + wms_dma_woffset+3)&(~3)) - wms_dma_cols;
  396.             DMA_DRAW_ALL_BYTES((*BYTE_XOR_LE(rda++)?wms_dma_fgcol:0));
  397.             break;
  398.         case 0x800e: /* ????? */
  399.         case 0x800c: /* draw all pixels as color (fill) */
  400.             DMA_DRAW_ALL_BYTES(wms_dma_fgcol);
  401.             break;
  402.         case 0x8010: /* draw nothing */
  403.             break;
  404.         case 0x8012: /* draw nonzero pixels x-flipped */
  405.             dma_skip = ((wms_dma_woffset + 3 - wms_dma_cols)&(~3)) + wms_dma_cols;
  406.             DMA_DRAW_NONZERO_BYTES(write_data,--);
  407.             break;
  408.         case 0x8013: /* draw all pixels x-flipped */
  409.             dma_skip = ((wms_dma_woffset + 3 - wms_dma_cols)&(~3)) + wms_dma_cols;
  410.             DMA_DRAW_ALL_BYTES(*BYTE_XOR_LE(rda--));
  411.             break;
  412.         case 0x801a: /* ????? */
  413.         case 0x8018: /* draw nonzero pixels as color x-flipped */
  414.             dma_skip = ((wms_dma_woffset + 3 - wms_dma_cols)&(~3)) + wms_dma_cols;
  415.             DMA_DRAW_NONZERO_BYTES(wms_dma_fgcol,--);
  416.             break;
  417.         case 0x8022: /* draw nonzero pixels y-flipped */
  418.             dma_skip = ((wms_dma_cols + wms_dma_woffset+3)&(~3)) - wms_dma_cols;
  419.             DMA_DRAW_NONZERO_BYTES(write_data,++);
  420.             break;
  421.         case 0x8032: /* draw nonzero pixels x-flipped and y-flipped */
  422.             dma_skip = ((wms_dma_woffset + 3 - wms_dma_cols)&(~3)) + wms_dma_cols;
  423.             DMA_DRAW_NONZERO_BYTES(write_data,--);
  424.             break;
  425.         default:
  426.             logerror("\nCPU #0 PC %08x: unhandled DMA command %04x:\n",cpu_get_pc(), data);
  427.             logerror("%04x %04x x%04x y%04x  c%04x r%04x p%04x c%04x\n",wms_dma_subbank, wms_dma_bank, wms_dma_x, wms_dma_y, wms_dma_cols, wms_dma_rows, wms_dma_pal, wms_dma_fgcol );
  428.             break;
  429.         }
  430.         /*
  431.          * One pixel every 41 ns (1e-9 sec)
  432.          */
  433.         if (FAST_DMA)
  434.             dma_callback(1);
  435.         else
  436.             timer_set(TIME_IN_NSEC(41*wms_dma_cols*wms_dma_rows), 0, dma_callback);
  437.         break;
  438.     case 2:
  439.         wms_dma_woffset = data;
  440.         break;
  441.     case 4:
  442.         wms_dma_subbank = data>>3;
  443.         break;
  444.     case 6:
  445.         wms_dma_bank = ((data&0xfe00)?(data-0x200)*0x2000:data*0x2000);
  446.         break;
  447.     case 8:
  448.         wms_dma_x = data&0x1ff;
  449.         break;
  450.     case 0x0a:
  451.         wms_dma_y = data&0x1ff;
  452.         break;
  453.     case 0x0c:
  454.         wms_dma_cols = data;
  455.         dma_skip = data;
  456.         break;
  457.     case 0x0e:
  458.         wms_dma_rows = data;
  459.         break;
  460.     case 0x10:  /* set palette */
  461.         wms_dma_pal = (data&0xff) << 8;
  462.         wms_dma_pal_word = data;
  463.         break;
  464.     case 0x12:  /* set color for 1-bit */
  465.         wms_dma_fgcol = data&0xff;
  466.         break;
  467.     default:
  468.         break;
  469.     }
  470. }
  471.  
  472. #define DMA2_GET_SKIPS(xdir)                                    \
  473.     for (j=1;((j>=0)&&(data&0x0080));j--)                        \
  474.     {                                                            \
  475.         switch(wms_dma_8pos&0x07)                                \
  476.         {                                                        \
  477.         case 0:                                                    \
  478.             write_data = (*BYTE_XOR_LE(rda))&0x0f;                \
  479.             break;                                                \
  480.         case 1:                                                    \
  481.         case 2:                                                    \
  482.         case 3:                                                    \
  483.             write_data = (((*BYTE_XOR_LE(rda))>>(wms_dma_8pos&0x07))&0x0f); \
  484.             break;                                                \
  485.         case 4:                                                    \
  486.             write_data = (((*BYTE_XOR_LE(rda++))>>4)&0x0f);        \
  487.             break;                                                \
  488.         case 5:                                                    \
  489.             write_data = (((*BYTE_XOR_LE(rda++))>>5)&0x07);        \
  490.             write_data |= (((*BYTE_XOR_LE(rda))<<3)&0x08);        \
  491.             break;                                                \
  492.         case 6:                                                    \
  493.             write_data = (((*BYTE_XOR_LE(rda++))>>6)&0x03);        \
  494.             write_data |= (((*BYTE_XOR_LE(rda))<<2)&0x0c);        \
  495.             break;                                                \
  496.         case 7:                                                    \
  497.             write_data = (((*BYTE_XOR_LE(rda++))>>7)&0x01);        \
  498.             write_data |= (((*BYTE_XOR_LE(rda))<<1)&0x0e);        \
  499.             break;                                                \
  500.         }                                                        \
  501.         if (j)                                                    \
  502.         {                                                        \
  503.             wrva ##xdir##= wms_dma_preskip*write_data;            \
  504.             wms_dma_temp = wms_dma_preskip*write_data;            \
  505.         }                                                        \
  506.         else                                                    \
  507.         {                                                        \
  508.             write_cols_do -= ((wms_dma_postskip*write_data)+wms_dma_temp);    \
  509.             if (write_cols_do&0x80000000) write_cols_do = 1;    \
  510.         }                                                        \
  511.         wms_dma_8pos+=4;                                        \
  512.     }                                                            \
  513.  
  514. #define DMA2_DRAW_1BPP(check, writedata, advance)                \
  515.     for (j=write_cols;j>=0;j--)                                    \
  516.     {                                                            \
  517.         switch(wms_dma_8pos&0x07)                                \
  518.         {                                                        \
  519.         case 0:  /* 0x00 - 0x06 */                                \
  520.         case 1:                                                    \
  521.         case 2:                                                    \
  522.         case 3:                                                    \
  523.         case 4:                                                    \
  524.         case 5:                                                    \
  525.         case 6:                                                    \
  526.             write_data = ((*BYTE_XOR_LE(rda))>>(wms_dma_8pos&0x07))&0x01;    \
  527.             break;                                                \
  528.         case 7:  /* 0x07 */                                        \
  529.             write_data = (((*BYTE_XOR_LE(rda++))>>7)&0x01);        \
  530.             break;                                                \
  531.         }                                                        \
  532.         if (check)                                                \
  533.         {                                                        \
  534.             *wrva = wms_dma_pal | (writedata);                    \
  535.         }                                                        \
  536.         wrva##advance;                                            \
  537.         wms_dma_8pos++;                                            \
  538.     }                                                            \
  539.  
  540. #define DMA2_DRAW_2BPP(check, writedata, advance)                \
  541.     for (j=write_cols_do;j>=0;j--)                                \
  542.     {                                                            \
  543.         switch(wms_dma_8pos&0x07)                                \
  544.         {                                                        \
  545.         case 0:                                                    \
  546.             write_data = (*BYTE_XOR_LE(rda))&0x03;                \
  547.             break;                                                \
  548.         case 1:                                                    \
  549.             write_data = (((*BYTE_XOR_LE(rda))>>1)&0x03);        \
  550.             break;                                                \
  551.         case 2:                                                    \
  552.             write_data = (((*BYTE_XOR_LE(rda))>>2)&0x03);        \
  553.             break;                                                \
  554.         case 3:                                                    \
  555.             write_data = (((*BYTE_XOR_LE(rda))>>3)&0x03);        \
  556.             break;                                                \
  557.         case 4:                                                    \
  558.             write_data = (((*BYTE_XOR_LE(rda))>>4)&0x03);        \
  559.             break;                                                \
  560.         case 5:                                                    \
  561.             write_data = (((*BYTE_XOR_LE(rda))>>5)&0x03);        \
  562.             break;                                                \
  563.         case 6:                                                    \
  564.             write_data = (((*BYTE_XOR_LE(rda++))>>6)&0x03);        \
  565.             break;                                                \
  566.         case 7:                                                    \
  567.             write_data = (((*BYTE_XOR_LE(rda++))>>7)&0x01);        \
  568.             write_data |= (((*BYTE_XOR_LE(rda))<<1)&0x02);        \
  569.             break;                                                \
  570.         }                                                        \
  571.         if (check)                                                \
  572.         {                                                        \
  573.             *wrva = wms_dma_pal | (writedata);                    \
  574.         }                                                        \
  575.         wrva##advance;                                            \
  576.         wms_dma_8pos+=2;                                        \
  577.     }                                                            \
  578.  
  579. #define DMA2_DRAW_3BPP(check, writedata, advance)                \
  580.     for (j=write_cols_do;j>=0;j--)                                \
  581.     {                                                            \
  582.         switch(wms_dma_8pos&0x07)                                \
  583.         {                                                        \
  584.         case 0:                                                    \
  585.             write_data = (*BYTE_XOR_LE(rda))&0x07;                \
  586.             break;                                                \
  587.         case 1:                                                    \
  588.             write_data = (((*BYTE_XOR_LE(rda))>>1)&0x07);        \
  589.             break;                                                \
  590.         case 2:                                                    \
  591.             write_data = (((*BYTE_XOR_LE(rda))>>2)&0x07);        \
  592.             break;                                                \
  593.         case 3:                                                    \
  594.             write_data = (((*BYTE_XOR_LE(rda))>>3)&0x07);        \
  595.             break;                                                \
  596.         case 4:                                                    \
  597.             write_data = (((*BYTE_XOR_LE(rda))>>4)&0x07);        \
  598.             break;                                                \
  599.         case 5:                                                    \
  600.             write_data = (((*BYTE_XOR_LE(rda++))>>5)&0x07);        \
  601.             break;                                                \
  602.         case 6:                                                    \
  603.             write_data = (((*BYTE_XOR_LE(rda++))>>6)&0x03);        \
  604.             write_data |= (((*BYTE_XOR_LE(rda))<<2)&0x04);        \
  605.             break;                                                \
  606.         case 7:                                                    \
  607.             write_data = (((*BYTE_XOR_LE(rda++))>>7)&0x01);        \
  608.             write_data |= (((*BYTE_XOR_LE(rda))<<1)&0x06);        \
  609.             break;                                                \
  610.         }                                                        \
  611.         if (check)                                                \
  612.         {                                                        \
  613.             *wrva = wms_dma_pal | (writedata);                    \
  614.         }                                                        \
  615.         wrva##advance;                                            \
  616.         wms_dma_8pos+=3;                                        \
  617.     }                                                            \
  618.  
  619. #define DMA2_DRAW_4BPP(check, writedata, advance)                \
  620.     for (j=write_cols_do;j>=0;j--)                                \
  621.     {                                                            \
  622.         switch(wms_dma_8pos&0x07)                                \
  623.         {                                                        \
  624.         case 0:                                                    \
  625.             write_data = (*BYTE_XOR_LE(rda))&0x0f;                \
  626.             break;                                                \
  627.         case 1:                                                    \
  628.             write_data = (((*BYTE_XOR_LE(rda))>>1)&0x0f);        \
  629.             break;                                                \
  630.         case 2:                                                    \
  631.             write_data = (((*BYTE_XOR_LE(rda))>>2)&0x0f);        \
  632.             break;                                                \
  633.         case 3:                                                    \
  634.             write_data = (((*BYTE_XOR_LE(rda))>>3)&0x0f);        \
  635.             break;                                                \
  636.         case 4:                                                    \
  637.             write_data = (((*BYTE_XOR_LE(rda++))>>4)&0x0f);        \
  638.             break;                                                \
  639.         case 5:                                                    \
  640.             write_data = (((*BYTE_XOR_LE(rda++))>>5)&0x07);        \
  641.             write_data |= (((*BYTE_XOR_LE(rda))<<3)&0x08);        \
  642.             break;                                                \
  643.         case 6:                                                    \
  644.             write_data = (((*BYTE_XOR_LE(rda++))>>6)&0x03);        \
  645.             write_data |= (((*BYTE_XOR_LE(rda))<<2)&0x0c);        \
  646.             break;                                                \
  647.         case 7:                                                    \
  648.             write_data = (((*BYTE_XOR_LE(rda++))>>7)&0x01);        \
  649.             write_data |= (((*BYTE_XOR_LE(rda))<<1)&0x0e);        \
  650.             break;                                                \
  651.         }                                                        \
  652.         if (check)                                                \
  653.         {                                                        \
  654.             *wrva = wms_dma_pal | (writedata);                    \
  655.         }                                                        \
  656.         wrva##advance;                                            \
  657.         wms_dma_8pos+=4;                                        \
  658.     }                                                            \
  659.  
  660. #define DMA2_DRAW_5BPP(check, writedata, advance)                \
  661.     for (j=write_cols_do;j>=0;j--)                                \
  662.     {                                                            \
  663.         switch(wms_dma_8pos&0x07)                                \
  664.         {                                                        \
  665.         case 0:                                                    \
  666.             write_data = (*BYTE_XOR_LE(rda))&0x1f;                \
  667.             break;                                                \
  668.         case 1:                                                    \
  669.             write_data = (((*BYTE_XOR_LE(rda))>>1)&0x1f);        \
  670.             break;                                                \
  671.         case 2:                                                    \
  672.             write_data = (((*BYTE_XOR_LE(rda))>>2)&0x1f);        \
  673.             break;                                                \
  674.         case 3:                                                    \
  675.             write_data = (((*BYTE_XOR_LE(rda++))>>3)&0x1f);        \
  676.             break;                                                \
  677.         case 4:                                                    \
  678.             write_data = (((*BYTE_XOR_LE(rda++))>>4)&0x0f);        \
  679.             write_data |= (((*BYTE_XOR_LE(rda))<<4)&0x10);        \
  680.             break;                                                \
  681.         case 5:                                                    \
  682.             write_data = (((*BYTE_XOR_LE(rda++))>>5)&0x07);        \
  683.             write_data |= (((*BYTE_XOR_LE(rda))<<3)&0x18);        \
  684.             break;                                                \
  685.         case 6:                                                    \
  686.             write_data = (((*BYTE_XOR_LE(rda++))>>6)&0x03);        \
  687.             write_data |= (((*BYTE_XOR_LE(rda))<<2)&0x1c);        \
  688.             break;                                                \
  689.         case 7:                                                    \
  690.             write_data = (((*BYTE_XOR_LE(rda++))>>7)&0x01);        \
  691.             write_data |= (((*BYTE_XOR_LE(rda))<<1)&0x1e);        \
  692.             break;                                                \
  693.         }                                                        \
  694.         if (check)                                                \
  695.         {                                                        \
  696.             *wrva = wms_dma_pal | (writedata);                    \
  697.         }                                                        \
  698.         wrva##advance;                                            \
  699.         wms_dma_8pos+=5;                                        \
  700.     }                                                            \
  701.  
  702. #define DMA2_DRAW_6BPP(check, writedata, advance)                \
  703.     for (j=write_cols_do;j>=0;j--)                                \
  704.     {                                                            \
  705.         switch(wms_dma_8pos&0x07)                                \
  706.         {                                                        \
  707.         case 0:                                                    \
  708.             write_data = (*BYTE_XOR_LE(rda))&0x3f;                \
  709.             break;                                                \
  710.         case 1:                                                    \
  711.             write_data = (((*BYTE_XOR_LE(rda))>>1)&0x3f);        \
  712.             break;                                                \
  713.         case 2:                                                    \
  714.             write_data = (((*BYTE_XOR_LE(rda++))>>2)&0x3f);        \
  715.             break;                                                \
  716.         case 3:                                                    \
  717.             write_data = (((*BYTE_XOR_LE(rda++))>>3)&0x1f);        \
  718.             write_data |= (((*BYTE_XOR_LE(rda))<<5)&0x20);        \
  719.             break;                                                \
  720.         case 4:                                                    \
  721.             write_data = (((*BYTE_XOR_LE(rda++))>>4)&0x0f);        \
  722.             write_data |= (((*BYTE_XOR_LE(rda))<<4)&0x30);        \
  723.             break;                                                \
  724.         case 5:                                                    \
  725.             write_data = (((*BYTE_XOR_LE(rda++))>>5)&0x07);        \
  726.             write_data |= (((*BYTE_XOR_LE(rda))<<3)&0x38);        \
  727.             break;                                                \
  728.         case 6:                                                    \
  729.             write_data = (((*BYTE_XOR_LE(rda++))>>6)&0x03);        \
  730.             write_data |= (((*BYTE_XOR_LE(rda))<<2)&0x3c);        \
  731.             break;                                                \
  732.         case 7:                                                    \
  733.             write_data = (((*BYTE_XOR_LE(rda++))>>7)&0x01);        \
  734.             write_data |= (((*BYTE_XOR_LE(rda))<<1)&0x3e);        \
  735.             break;                                                \
  736.         }                                                        \
  737.         if (check)                                                \
  738.         {                                                        \
  739.             *wrva = wms_dma_pal | (writedata);                    \
  740.         }                                                        \
  741.         wrva##advance;                                            \
  742.         wms_dma_8pos+=6;                                        \
  743.     }                                                            \
  744.  
  745. #define DMA2_DRAW_7BPP(check, writedata, advance)                \
  746.     for (j=write_cols_do;j>=0;j--)                                \
  747.     {                                                            \
  748.         switch(wms_dma_8pos&0x07)                                \
  749.         {                                                        \
  750.         case 0:                                                    \
  751.             write_data = (*BYTE_XOR_LE(rda))&0x7f;                \
  752.             break;                                                \
  753.         case 1:                                                    \
  754.             write_data = (((*BYTE_XOR_LE(rda++))>>1)&0x7f);        \
  755.             break;                                                \
  756.         case 2:                                                    \
  757.             write_data = (((*BYTE_XOR_LE(rda++))>>2)&0x3f);        \
  758.             write_data |= (((*BYTE_XOR_LE(rda))<<6)&0x40);        \
  759.             break;                                                \
  760.         case 3:                                                    \
  761.             write_data = (((*BYTE_XOR_LE(rda++))>>3)&0x1f);        \
  762.             write_data |= (((*BYTE_XOR_LE(rda))<<5)&0x60);        \
  763.             break;                                                \
  764.         case 4:                                                    \
  765.             write_data = (((*BYTE_XOR_LE(rda++))>>4)&0x0f);        \
  766.             write_data |= (((*BYTE_XOR_LE(rda))<<4)&0x70);        \
  767.             break;                                                \
  768.         case 5:                                                    \
  769.             write_data = (((*BYTE_XOR_LE(rda++))>>5)&0x07);        \
  770.             write_data |= (((*BYTE_XOR_LE(rda))<<3)&0x78);        \
  771.             break;                                                \
  772.         case 6:                                                    \
  773.             write_data = (((*BYTE_XOR_LE(rda++))>>6)&0x03);        \
  774.             write_data |= (((*BYTE_XOR_LE(rda))<<2)&0x7c);        \
  775.             break;                                                \
  776.         case 7:                                                    \
  777.             write_data = (((*BYTE_XOR_LE(rda++))>>7)&0x01);        \
  778.             write_data |= (((*BYTE_XOR_LE(rda))<<1)&0x7e);        \
  779.             break;                                                \
  780.         }                                                        \
  781.         if (check)                                                \
  782.         {                                                        \
  783.             *wrva = wms_dma_pal | (writedata);                    \
  784.         }                                                        \
  785.         wrva##advance;                                            \
  786.         wms_dma_8pos+=7;                                        \
  787.     }                                                            \
  788.  
  789. #define DMA2_DRAW_8BPP(check, writedata, advance)                \
  790.     for (j=write_cols_do;j>=0;j--)                                \
  791.     {                                                            \
  792.         switch(wms_dma_8pos&0x07)                                \
  793.         {                                                        \
  794.         case 0:                                                    \
  795.             write_data = (*BYTE_XOR_LE(rda++))&0xff;            \
  796.             break;                                                \
  797.         case 1:                                                    \
  798.             write_data = (((*BYTE_XOR_LE(rda++))>>1)&0x7f);        \
  799.             write_data |= (((*BYTE_XOR_LE(rda))<<7)&0x80);        \
  800.             break;                                                \
  801.         case 2:                                                    \
  802.             write_data = (((*BYTE_XOR_LE(rda++))>>2)&0x3f);        \
  803.             write_data |= (((*BYTE_XOR_LE(rda))<<6)&0xc0);        \
  804.             break;                                                \
  805.         case 3:                                                    \
  806.             write_data = (((*BYTE_XOR_LE(rda++))>>3)&0x1f);        \
  807.             write_data |= (((*BYTE_XOR_LE(rda))<<5)&0xe0);        \
  808.             break;                                                \
  809.         case 4:                                                    \
  810.             write_data = (((*BYTE_XOR_LE(rda++))>>4)&0x0f);        \
  811.             write_data |= (((*BYTE_XOR_LE(rda))<<4)&0xf0);        \
  812.             break;                                                \
  813.         case 5:                                                    \
  814.             write_data = (((*BYTE_XOR_LE(rda++))>>5)&0x07);        \
  815.             write_data |= (((*BYTE_XOR_LE(rda))<<3)&0xf8);        \
  816.             break;                                                \
  817.         case 6:                                                    \
  818.             write_data = (((*BYTE_XOR_LE(rda++))>>6)&0x03);        \
  819.             write_data |= (((*BYTE_XOR_LE(rda))<<2)&0xfc);        \
  820.             break;                                                \
  821.         case 7:                                                    \
  822.             write_data = (((*BYTE_XOR_LE(rda++))>>7)&0x01);        \
  823.             write_data |= (((*BYTE_XOR_LE(rda))<<1)&0xfe);        \
  824.             break;                                                \
  825.         }                                                        \
  826.         if (check)                                                \
  827.         {                                                        \
  828.             *wrva = wms_dma_pal | (writedata);                    \
  829.         }                                                        \
  830.         wrva##advance;                                            \
  831.     }                                                            \
  832.  
  833. #define DMA2_CLIP(bpp, xdir, clip)                                \
  834.     if (clip)                                                    \
  835.     {                                                            \
  836.         wms_dma_8pos&=0x07;                                        \
  837.         wms_dma_8pos+=((clip)*(bpp));                            \
  838.         rda+=(wms_dma_8pos>>3);                                    \
  839.         wrva##xdir##=clip;                                        \
  840.     }                                                            \
  841.  
  842. #define DMA2_DRAW(bpp, xdir, ydir, check, writedata, advance)    \
  843.     for (i=0;i<(wms_dma_write_rows<<9);i+=512)                    \
  844.     {                                                            \
  845.         wrva = &(wms_videoram[(wms_dma_dst##ydir##i)&0x3ffff]);    \
  846.         write_cols_do = write_cols;                                \
  847.         DMA2_GET_SKIPS(xdir);                                    \
  848.         if ((wrva>=wrvatop)&&(wrva<=wrvabot))                    \
  849.         {                                                        \
  850.             DMA2_DRAW_##bpp##BPP(check, writedata, advance);    \
  851.             DMA2_CLIP(bpp, xdir, wms_dma_postclip);                \
  852.         }                                                        \
  853.         else                                                    \
  854.         {                                                        \
  855.             wms_dma_8pos&=0x07;                                    \
  856.             wms_dma_8pos+=((write_cols_do+1)*bpp);                \
  857.             rda+=(wms_dma_8pos>>3);                                \
  858.         }                                                        \
  859.     }                                                            \
  860.  
  861.  
  862. WRITE_HANDLER( wms_dma2_w )
  863. {
  864.     /*
  865.      * This is a MESS! -- lots to do
  866.      * one pixel every 41 ns (1e-9 sec)
  867.      * 50,000,000 cycles per second
  868.      * --> approximately 2 cycles per pixel
  869.      */
  870.  
  871.     UINT32 i, pal, write_data=0, line_skip, dma_skip=0;
  872.     int j, write_cols, write_cols_do;
  873.     UINT8 *rda;
  874.     UINT16 *wrva, *wrvatop, *wrvabot;
  875.  
  876.     switch (offset)
  877.     {
  878.     case 0:
  879.         break;
  880.     case 2:
  881.         if (wms_dma_bclip >= 512) wms_dma_bclip = 512;
  882.         wms_dma_write_rows = wms_dma_rows;
  883.         wrvatop = &(wms_videoram[(wms_dma_tclip<<9)]);
  884.         wrvabot = &(wms_videoram[(wms_dma_bclip<<9)+0x1ff]);
  885.  
  886.         write_cols = wms_dma_cols-1;
  887.         wms_dma_postclip = (wms_dma_cols+wms_dma_x >= 512?wms_dma_cols+wms_dma_x - 512:0);
  888.         wms_dma_preclip = 0;
  889.         wms_dma_postclip = 0;
  890.  
  891.  
  892.         wms_dma_dst = ((wms_dma_y<<9) + (wms_dma_x)); /* byte addr */
  893.  
  894.         rda = &(GFX_ROM[wms_dma_bank+wms_dma_subbank]);
  895.         wms_dma_stat = data;
  896.         if (wms_dma_bank+wms_dma_subbank > wms_gfx_rom_size) data = 0x8000;
  897.         wms_dma_postskip = 1<<((data&0x0c00)>>10);
  898.         wms_dma_preskip = 1<<((data&0x0300)>>8);
  899.  
  900.         if (0)
  901.         {
  902.             logerror("\nCPU #0 PC %08x: DMA command %04x: (offs%02x) unk2=%04x sr%04x\n",cpu_get_pc(), data, wms_dma_8pos, wms_unk2, wms_sysreg2);
  903.             logerror("%08x x%04x y%04x c%04x r%04x p%04x c%04x  %04x %04x %04x %04x %04x %04x\n",wms_dma_subbank+wms_dma_bank+0x400000, wms_dma_x, wms_dma_y, wms_dma_cols, wms_dma_rows, wms_dma_pal, wms_dma_fgcol, wms_dma_14, wms_dma_16, wms_dma_tclip, wms_dma_bclip, wms_dma_1c, wms_dma_1e );
  904.         }
  905.         /*
  906.          * DMA registers
  907.          * ------------------
  908.          *
  909.          *  Register | Bit              | Use
  910.          * ----------+-FEDCBA9876543210-+------------
  911.          *     0     | x--------------- | trigger write (or clear if zero)
  912.          *           | -421------------ | image bpp (0=8)
  913.          *           | ----84---------- | post skip size = (1<<x)
  914.          *           | ------21-------- | pre skip size = (1<<x)
  915.          *           | --------8------- | pre/post skip enable
  916.          *           | ----------2----- | flip y
  917.          *           | -----------1---- | flip x
  918.          *           | ------------8--- | blit nonzero pixels as color
  919.          *           | -------------4-- | blit zero pixels as color
  920.          *           | --------------2- | blit nonzero pixels
  921.          *           | ---------------1 | blit zero pixels
  922.          *     1     | xxxxxxxxxxxxxxxx | width offset
  923.          *     2     | xxxxxxxxxxxxxxxx | source address low word
  924.          *     3     | xxxxxxxxxxxxxxxx | source address high word
  925.          *     4     | xxxxxxxxxxxxxxxx | detination x
  926.          *     5     | xxxxxxxxxxxxxxxx | destination y
  927.          *     6     | xxxxxxxxxxxxxxxx | image columns
  928.          *     7     | xxxxxxxxxxxxxxxx | image rows
  929.          *     8     | xxxxxxxxxxxxxxxx | palette
  930.          *     9     | xxxxxxxxxxxxxxxx | color
  931.          */
  932.         switch(data&0xf07f)
  933.         {
  934.         case 0x0000: /* clear registers */
  935.             dma_skip=0;
  936.             wms_dma_cols=1;
  937.             wms_dma_rows=0;
  938. /*            wms_dma_pal=0; */
  939.             wms_dma_fgcol=0;
  940.             break;
  941.         case 0xf000: /* draw nothing ???*/
  942.         case 0xb000: /* draw nothing ???*/
  943.         case 0xa000: /* draw nothing ???*/
  944.         case 0xe000: /* draw nothing ???*/
  945.         case 0x8000: /* draw nothing */
  946.             break;
  947.         case 0x8002: /* draw only nonzero pixels (8bpp) */
  948.             DMA2_DRAW(8, +, +, write_data, write_data, ++);
  949.             break;
  950.         case 0x9002: /* draw only nonzero pixels (1bpp) */
  951.             DMA2_DRAW(1, +, +, write_data, write_data, ++);
  952.             break;
  953.         case 0xa002: /* draw only nonzero pixels (2bpp) */
  954.             DMA2_DRAW(2, +, +, write_data, write_data, ++);
  955.             break;
  956.         case 0xb002: /* draw only nonzero pixels (3bpp) */
  957.             DMA2_DRAW(3, +, +, write_data, write_data, ++);
  958.             break;
  959.         case 0xc002: /* draw only nonzero pixels (4bpp) */
  960.             DMA2_DRAW(4, +, +, write_data, write_data, ++);
  961.             break;
  962.         case 0xd002: /* draw only nonzero pixels (5bpp) */
  963.             DMA2_DRAW(5, +, +, write_data, write_data, ++);
  964.             break;
  965.         case 0xe042: /* draw only nonzero pixels (6bpp) ????? */
  966.             /* fixme 0x0040 ????? */
  967.         case 0xe002: /* draw only nonzero pixels (6bpp) */
  968.             DMA2_DRAW(6, +, +, write_data, write_data, ++);
  969.             break;
  970.         case 0xf002: /* draw only nonzero pixels (7bpp) */
  971.             DMA2_DRAW(7, +, +, write_data, write_data, ++);
  972.             break;
  973.         case 0x8003: /* draw all pixels */
  974.             dma_skip = ((wms_dma_cols + wms_dma_woffset)) - wms_dma_cols;
  975.             DMA_DRAW_ALL_BYTES(*BYTE_XOR_LE(rda++));
  976.             if ((data&0x0080)||(wms_dma_8pos&0x07)) logerror("\nCPU #0 PC %08x: unhandled DMA command %04x:  (off%x)\n",cpu_get_pc(), data, wms_dma_8pos&0x07);
  977.             break;
  978.         case 0x8008: /* draw nonzero pixels as color (8bpp) */
  979.             DMA2_DRAW(8, +, +, write_data, wms_dma_fgcol, ++);
  980.             break;
  981.         case 0x9008: /* draw nonzero pixels as color (1bpp) */
  982.             DMA2_DRAW(1, +, +, write_data, wms_dma_fgcol, ++);
  983.             break;
  984.         case 0xc008: /* draw nonzero pixels as color (4bpp) */
  985.             DMA2_DRAW(4, +, +, write_data, wms_dma_fgcol, ++);
  986.             break;
  987.         case 0xe008: /* draw nonzero pixels as color (6bpp) */
  988.             DMA2_DRAW(6, +, +, write_data, wms_dma_fgcol, ++);
  989.             break;
  990.         case 0x8009: /* draw nonzero pixels as color, zero as zero */
  991.             dma_skip = ((wms_dma_cols + wms_dma_woffset)) - wms_dma_cols;
  992.             DMA_DRAW_ALL_BYTES((*BYTE_XOR_LE(rda++)?wms_dma_fgcol:0));
  993.             if ((data&0x0080)||(wms_dma_8pos&0x07)) logerror("\nCPU #0 PC %08x: unhandled DMA command %04x:  (off%x)\n",cpu_get_pc(), data, wms_dma_8pos&0x07);
  994.             break;
  995.         case 0xe00c: /* draw all pixels as color (fill) */
  996.         case 0xd00c: /* draw all pixels as color (fill) */
  997.         case 0xc00c: /* draw all pixels as color (fill) */
  998.         case 0xb00c: /* draw all pixels as color (fill) */
  999.         case 0xa00c: /* draw all pixels as color (fill) */
  1000.         case 0x900c: /* draw all pixels as color (fill) */
  1001.         case 0x800c: /* draw all pixels as color (fill) */
  1002.             DMA_DRAW_ALL_BYTES(wms_dma_fgcol);
  1003.             break;
  1004.         case 0x8010: /* draw nothing ???? */
  1005.             break;
  1006.         case 0x8012: /* draw nonzero pixels x-flipped (8bpp) */
  1007.             DMA2_DRAW(8, -, +, write_data, write_data, --);
  1008.             break;
  1009.         case 0xc012: /* draw nonzero pixels x-flipped (4bpp) */
  1010.             DMA2_DRAW(4, -, +, write_data, write_data, --);
  1011.             break;
  1012.         case 0xd012: /* draw nonzero pixels x-flipped (5bpp) */
  1013.             DMA2_DRAW(5, -, +, write_data, write_data, --);
  1014.             break;
  1015.         case 0xe012: /* draw nonzero pixels x-flipped (6bpp) */
  1016.             DMA2_DRAW(6, -, +, write_data, write_data, --);
  1017.             break;
  1018.         case 0x8013: /* draw all pixels x-flipped (8bpp) */
  1019.             dma_skip = ((wms_dma_woffset - wms_dma_cols)) + wms_dma_cols;
  1020.             DMA_DRAW_ALL_BYTES(*BYTE_XOR_LE(rda--));
  1021.             if ((data&0x0080)||(wms_dma_8pos&0x07)) logerror("\nCPU #0 PC %08x: unhandled DMA command %04x:  (off%x)\n",cpu_get_pc(), data, wms_dma_8pos&0x07);
  1022.             break;
  1023.         case 0x8018: /* draw nonzero pixels as color x-flipped (8bpp)*/
  1024.             DMA2_DRAW(8, -, +, write_data, wms_dma_fgcol, --);
  1025.             break;
  1026.         case 0xe018: /* draw only nonzero pixels (6bpp) */
  1027.             DMA2_DRAW(6, -, +, write_data, wms_dma_fgcol, --);
  1028.             break;
  1029.         case 0x8022: /* draw nonzero pixels y-flipped (8bpp) */
  1030.             DMA2_DRAW(8, +, -, write_data, write_data, ++);
  1031.             break;
  1032.         case 0xe022: /* draw nonzero pixels y-flipped (6bpp) */
  1033.             DMA2_DRAW(6, +, -, write_data, write_data, ++);
  1034.             break;
  1035.         case 0x8032: /* draw nonzero pixels x- and y-flipped (8pp) */
  1036.             DMA2_DRAW(8, -, -, write_data, write_data, --);
  1037.             break;
  1038.         case 0xe032: /* draw nonzero pixels x- and y-flipped (6bpp) */
  1039.             DMA2_DRAW(6, -, -, write_data, write_data, --);
  1040.             break;
  1041.         default:
  1042.             logerror("\nCPU #0 PC %08x: unhandled DMA command %04x:\n",cpu_get_pc(), data);
  1043.             logerror("%08x x%04x y%04x c%04x r%04x p%04x c%04x  %04x %04x %04x %04x %04x %04x\n",wms_dma_subbank+wms_dma_bank+0x400000, wms_dma_x, wms_dma_y, wms_dma_cols, wms_dma_rows, wms_dma_pal, wms_dma_fgcol, wms_dma_14, wms_dma_16, wms_dma_tclip, wms_dma_bclip, wms_dma_1c, wms_dma_1e );
  1044.             break;
  1045.         }
  1046.         if (FAST_DMA)
  1047.             dma_callback(1);
  1048.         else
  1049.             timer_set(TIME_IN_NSEC(41*wms_dma_cols*wms_dma_rows), 0, dma_callback);
  1050.         break;
  1051.     case 4:
  1052.         wms_dma_subbank = data>>3;
  1053.         wms_dma_8pos = data&0x07;
  1054.         break;
  1055.     case 6:
  1056.         wms_dma_bank = ((data&0xfe00)?(data-0x200)*0x2000:data*0x2000);
  1057.         break;
  1058.     case 8:
  1059.         wms_dma_x = data&0x1ff;
  1060.         break;
  1061.     case 0x0a:
  1062.         wms_dma_y = data&0x1ff;
  1063.         break;
  1064.     case 0x0c:
  1065.         wms_dma_cols = data;
  1066.         dma_skip = data;
  1067.         break;
  1068.     case 0x0e:
  1069.         wms_dma_rows = data;
  1070.         break;
  1071.     case 0x10:  /* set palette */
  1072.         wms_dma_pal = (data&0xff00);  /* changed from rev1? */
  1073. /*        wms_dma_pal = (data&0xffff); */
  1074.         wms_dma_pal_word = data;
  1075.         break;
  1076.     case 0x12:  /* set color for 1-bit */
  1077.         wms_dma_fgcol = data&0xff;
  1078.         break;
  1079.     case 0x14:
  1080.         wms_dma_14 = data;
  1081.         break;
  1082.     case 0x16:
  1083.         wms_dma_16 = data;
  1084.         break;
  1085.     case 0x18:
  1086.         wms_dma_tclip = data;
  1087.         break;
  1088.     case 0x1a:
  1089.         wms_dma_bclip = data;
  1090.         break;
  1091.     case 0x1c:
  1092.         wms_dma_1c = data;
  1093.         break;
  1094.     case 0x1e:
  1095.         wms_dma_1e = data;
  1096.         break;
  1097.     default:
  1098.         logerror("dma offset %x: %x\n",offset, data);
  1099.         break;
  1100.     }
  1101. }
  1102.  
  1103. void wms_to_shiftreg(UINT32 address, UINT16* shiftreg)
  1104. {
  1105.     memcpy(shiftreg, &wms_videoram[address>>3], 2*512*sizeof(UINT16));
  1106. }
  1107.  
  1108. void wms_from_shiftreg(UINT32 address, UINT16* shiftreg)
  1109. {
  1110.     memcpy(&wms_videoram[address>>3], shiftreg, 2*512*sizeof(UINT16));
  1111. }
  1112.  
  1113. WRITE_HANDLER( wms_01c00060_w ) /* protection and more */
  1114. {
  1115.     if ((data&0xfdff) == 0x0000) /* enable CMOS write */
  1116.     {
  1117.         smashtv_cmos_w_enable = 1;
  1118. /*        logerror("Enable CMOS writes\n"); */
  1119.     }
  1120.     else if ((data&0xfdff) == 0x0100) /* disable CMOS write */
  1121.     {
  1122. /*        smashtv_cmos_w_enable = 0; */
  1123. /*        logerror("Disable CMOS writes\n"); */
  1124.     }
  1125.     else
  1126.     logerror("CPU #0 PC %08x: warning - write %x to protection chip\n", cpu_get_pc(), data);
  1127. }
  1128. READ_HANDLER( wms_01c00060_r ) /* protection and more */
  1129. {
  1130.     if (cpu_get_pc() == wms_protect_s) /* protection */
  1131.     {
  1132.         cpu_set_pc(wms_protect_d); /* skip it! */
  1133.         return 0xffffffff;
  1134.     }
  1135.     logerror("CPU #0 PC %08x: warning - unhandled read from protection chip\n",cpu_get_pc());
  1136.     return 0xffffffff;
  1137. }
  1138.  
  1139. WRITE_HANDLER( wms_sysreg_w )
  1140. {
  1141.     /*
  1142.      * Narc system register
  1143.      * ------------------
  1144.      *
  1145.      *   | Bit              | Use
  1146.      * --+-FEDCBA9876543210-+------------
  1147.      *   | xxxxxxxx-------- |   7 segment led on CPU board
  1148.      *   | --------xx------ |   CMOS page
  1149.      *   | ----------x----- | - OBJ PAL RAM select
  1150.      *   | -----------x---- | - autoerase enable
  1151.      *   | ---------------- | - watchdog
  1152.      *
  1153.      */
  1154.     wms_cmos_page = (data&0xc0)<<7; /* 0x2000 offsets */
  1155.     if((data&0x20)&&wms_objpalram_select) /* access VRAM */
  1156.     {
  1157.         install_mem_write_handler(0, TOBYTE(0x00000000), TOBYTE(0x001fffff), wms_vram_w);
  1158.         install_mem_read_handler (0, TOBYTE(0x00000000), TOBYTE(0x001fffff), wms_vram_r);
  1159.     }
  1160.     else if(!(data&0x20)&&!wms_objpalram_select) /* access OBJPALRAM */
  1161.     {
  1162.         install_mem_write_handler(0, TOBYTE(0x00000000), TOBYTE(0x001fffff), wms_objpalram_w);
  1163.         install_mem_read_handler (0, TOBYTE(0x00000000), TOBYTE(0x001fffff), wms_objpalram_r);
  1164.     }
  1165.     wms_objpalram_select = ((data&0x20)?0:0x40000);
  1166.  
  1167.     if (data&0x10) /* turn off auto-erase */
  1168.     {
  1169.         if (wms_autoerase_enable)
  1170.             wms_update_partial(cpu_getscanline());
  1171.         wms_autoerase_enable = 0;
  1172.     }
  1173.     else /* enable auto-erase */
  1174.     {
  1175.         if (!wms_autoerase_enable)
  1176.             wms_update_partial(cpu_getscanline());
  1177.         wms_autoerase_enable = 1;
  1178.     }
  1179. }
  1180.  
  1181. WRITE_HANDLER( wms_sysreg2_w )
  1182. {
  1183.     wms_sysreg2 = data;
  1184. /*    wms_cmos_page = (data&0xc0)<<8;    0x4000 offsets    */
  1185.     wms_cmos_page = 0; /* 0x4000 offsets */
  1186.     if(data&0x20&&wms_objpalram_select) /* access VRAM */
  1187.     {
  1188.         install_mem_write_handler(0, TOBYTE(0x00000000), TOBYTE(0x003fffff), wms_vram_w);
  1189.         install_mem_read_handler (0, TOBYTE(0x00000000), TOBYTE(0x003fffff), wms_vram_r);
  1190.     }
  1191.     else if(!(data&0x20)&&!wms_objpalram_select) /* access OBJPALRAM */
  1192.     {
  1193.         install_mem_write_handler(0, TOBYTE(0x00000000), TOBYTE(0x003fffff), wms_objpalram_w);
  1194.         install_mem_read_handler (0, TOBYTE(0x00000000), TOBYTE(0x003fffff), wms_objpalram_r);
  1195.     }
  1196.     wms_objpalram_select = ((data&0x20)?0:0x40000);
  1197. /*    if (data&0x10)    turn off auto-erase    */
  1198. /*    { */
  1199. /*        wms_autoerase_enable = 0; */
  1200. /*    } */
  1201. /*    else    enable auto-erase    */
  1202. /*    { */
  1203. /*        wms_autoerase_enable = 1; */
  1204. /*        wms_autoerase_start  = cpu_getscanline(); */
  1205. /*    } */
  1206. }
  1207.  
  1208. WRITE_HANDLER( wms_unk1_w )
  1209. {
  1210. /*    INT8 buf[80]; */
  1211.     wms_unk1 = data;
  1212.     if (data == 0x4472)
  1213.     {
  1214.         /* 0x4472 --> load ug14, ug16  */
  1215.         cpu_bankbase[8] = &(gfxrombackup[0x000000]);
  1216.     }
  1217.     else if (data == 0x44f2)
  1218.     {
  1219.         /* 0x44f2 --> load ug17 low ?*/
  1220.         cpu_bankbase[8] = &(gfxrombackup[0x400000]);
  1221.     }
  1222.     else
  1223.     /* 0x00f2 --> load ug17 high */
  1224.     {
  1225.         cpu_bankbase[8] = &(gfxrombackup[0x000000]);
  1226.     }
  1227.     wms_sysreg2 = data;
  1228. /*    wms_cmos_page = (data&0xc0)<<8;    0x4000 offsets    */
  1229.     wms_cmos_page = 0; /* 0x4000 offsets */
  1230.     if(data&0x20&&wms_objpalram_select) /* access VRAM */
  1231.     {
  1232.         install_mem_write_handler(0, TOBYTE(0x00000000), TOBYTE(0x003fffff), wms_vram_w);
  1233.         install_mem_read_handler (0, TOBYTE(0x00000000), TOBYTE(0x003fffff), wms_vram_r);
  1234.     }
  1235.     else if(!(data&0x20)&&!wms_objpalram_select) /* access OBJPALRAM */
  1236.     {
  1237.         install_mem_write_handler(0, TOBYTE(0x00000000), TOBYTE(0x003fffff), wms_objpalram_w);
  1238.         install_mem_read_handler (0, TOBYTE(0x00000000), TOBYTE(0x003fffff), wms_objpalram_r);
  1239.     }
  1240.     wms_objpalram_select = ((data&0x20)?0:0x40000);
  1241. /*    if (data&0x10)    turn off auto-erase    */
  1242. /*    { */
  1243. /*        wms_autoerase_enable = 0; */
  1244. /*    } */
  1245. /*    else    enable auto-erase    */
  1246. /*    { */
  1247. /*        wms_autoerase_enable = 1; */
  1248. /*        wms_autoerase_start  = cpu_getscanline(); */
  1249. /*    } */
  1250.  
  1251. /*    logerror("wms_unk1:       %04x\n", data); */
  1252. /*#ifdef MAME_DEBUG */
  1253. /*    sprintf(buf,"write: 0x%04x",data); */
  1254. /*    usrintf_showmessage(buf); */
  1255. /*#endif */
  1256. }
  1257.  
  1258. extern int debug_key_pressed;
  1259. WRITE_HANDLER( wms_unk2_w )
  1260. {
  1261. /*    INT8 buf[80]; */
  1262.     if (offset==2)
  1263.     {
  1264.         wms_unk2 = data;
  1265. /*#ifdef MAME_DEBUG */
  1266. /*        sprintf(buf,"unk2 write: 0x%04x",data); */
  1267. /*        usrintf_showmessage(buf); */
  1268. /*#endif */
  1269.     }
  1270. /*    if (offset == 2) debug_key_pressed = 1; */
  1271.     if (offset != 6) logerror("wms_unk2(%04x): %04x\n", offset<<3, data);
  1272. }
  1273.  
  1274. static READ_HANDLER( narc_unknown_r )
  1275. {
  1276.     int ans = 0xffff;
  1277.     return ans;
  1278. }
  1279.  
  1280. WRITE_HANDLER( wms_cmos_w )
  1281. {
  1282.     if (smashtv_cmos_w_enable)
  1283.     {
  1284.         COMBINE_WORD_MEM(&wms_cmos_ram[(offset)+wms_cmos_page], data);
  1285.     }
  1286.     else
  1287.     logerror("CPU #0 PC %08x: warning - write %x to disabled CMOS address %x\n", cpu_get_pc(), data, offset);
  1288.  
  1289. }
  1290. READ_HANDLER( wms_cmos_r )
  1291. {
  1292.     return READ_WORD(&wms_cmos_ram[(offset)+wms_cmos_page]);
  1293. }
  1294.  
  1295. void wms_load_code_roms(void)
  1296. {
  1297.     memcpy(CODE_ROM,memory_region(REGION_CPU1),wms_code_rom_size);
  1298. }
  1299.  
  1300. #ifndef ALIGN_SHORTS
  1301. #  define READ_U16(a)    (*(INT16 *)a)
  1302. #  define WRITE_U16(a,x) (*(INT16 *)a = (x))
  1303. #else
  1304. #  ifdef LSB_FIRST  /* unaligned read and write macros, cpg */
  1305. #    define READ_U16(a)    ((INT16)(*(UINT8 *)a | (*((UINT8 *)a+1) << 8)))
  1306. #    define WRITE_U16(a,x) do { *(UINT8 *)a = x; *((UINT8 *)a+1) = (x>>8); } while (0)
  1307. #  else
  1308. #    define READ_U16(a)    ((INT16)((*(UINT8 *)a << 8) | *((UINT8 *)a+1)))
  1309. #    define WRITE_U16(a,x) do { *(UINT8 *)a = (x>>8); *((UINT8 *)a+1) = x; } while (0)
  1310. #  endif
  1311. #endif
  1312.  
  1313. #ifndef ALIGN_INTS
  1314. #  define READ_U32(a)    (*(INT32 *)a)
  1315. #  define WRITE_U32(a,x) (*(INT16 *)a = (x))
  1316. #else
  1317. #  ifdef LSB_FIRST  /* unaligned read and write macros, cpg */
  1318. #    define READ_U32(a) ((INT32)(*(UINT8 *)a | (*((UINT8 *)a+1) << 8) \
  1319.                         | (*((UINT8 *)a+2) << 16) | (*((UINT8 *)a+3) << 24)))
  1320. #    define WRITE_U32(a,x) do { *(UINT8 *)a = x; *((UINT8 *)a+1) = (x>>8); \
  1321.                            *((UINT8 *)a+2) = (x>>16); *((UINT8 *)a+3) = (x>>24); } while (0)
  1322. #  else
  1323. #    define READ_U32(a) ((INT32)((*(UINT8 *)a << 24) | (*((UINT8 *)a+1) << 16) \
  1324.                         | (*((UINT8 *)a+2) << 8) | *((UINT8 *)a+3)))
  1325. #    define WRITE_U32(a,x) do { *(UINT8 *)a = (x>>24); *((UINT8 *)a+1) = (x>>16); \
  1326.                            *((UINT8 *)a+2) = (x>>8); *((UINT8 *)a+3) = x; } while (0)
  1327. #  endif
  1328. #endif
  1329.  
  1330. #define READ_INT8(REG)        (*(INT8 *)BYTE_XOR_LE(&SCRATCH_RAM[TOBYTE((REG) & 0xffffff)]))
  1331. #define READ_INT16(REG)        READ_U16(&SCRATCH_RAM[TOBYTE((REG) & 0xffffff)])
  1332. #define READ_INT32(REG)        BIG_DWORD_LE(READ_U32(&SCRATCH_RAM[TOBYTE((REG) & 0xffffff)]))
  1333. #define WRITE_INT8(REG,DATA)    (*(INT8 *)BYTE_XOR_LE(&SCRATCH_RAM[TOBYTE((REG) & 0xffffff)]) = (DATA))
  1334. #define WRITE_INT16(REG,DATA)    WRITE_U16(&SCRATCH_RAM[TOBYTE((REG) & 0xffffff)],DATA)
  1335. #define WRITE_INT32(REG,DATA)    WRITE_U32(&SCRATCH_RAM[TOBYTE((REG) & 0xffffff)],BIG_DWORD_LE(DATA))
  1336.  
  1337. #define BURN_TIME(INST_CNT)        tms34010_ICount -= INST_CNT * TMS34010_AVGCYCLES
  1338.  
  1339. /* Speed up loop body */
  1340.  
  1341. #define DO_SPEEDUP_LOOP(OFFS1, OFFS2, A8SIZE, A7SIZE)        \
  1342.                                                             \
  1343.     a8 = READ_##A8SIZE(a2+OFFS1);                            \
  1344.     a7 = READ_##A7SIZE(a2+OFFS2);                            \
  1345.                                                             \
  1346.     if (a8 > a1)                                             \
  1347.     {                                                         \
  1348.         a4 = a0;                                             \
  1349.         a0 = a2;                                             \
  1350.         a1 = a8;                                             \
  1351.         a5 = a7;                                             \
  1352.         BURN_TIME(10);                                        \
  1353.         continue;                                             \
  1354.     }                                                         \
  1355.                                                             \
  1356.     if ((a8 == a1) && (a7 >= a5))                             \
  1357.     {                                                         \
  1358.         a4 = a0;                                             \
  1359.         a0 = a2;                                             \
  1360.         a1 = a8;                                             \
  1361.         a5 = a7;                                             \
  1362.         BURN_TIME(13);                                        \
  1363.         continue;                                             \
  1364.     }                                                         \
  1365.                                                             \
  1366.     WRITE_INT32(a4, a2);                                    \
  1367.     WRITE_INT32(a0, READ_INT32(a2));                        \
  1368.     WRITE_INT32(a2, a0);                                    \
  1369.     a4 = a2;                                                 \
  1370.     BURN_TIME(17);
  1371.  
  1372.  
  1373. /* Speedup catch for games using 1 location */
  1374.  
  1375. #define DO_SPEEDUP_LOOP_1(LOC, OFFS1, OFFS2, A8SIZE, A7SIZE)    \
  1376.                                                             \
  1377.     UINT32 a0 = LOC;                                        \
  1378.     UINT32 a2;                                                \
  1379.     UINT32 a4 = 0;                                            \
  1380.      INT32 a1 = 0x80000000;                                    \
  1381.      INT32 a5 = 0x80000000;                                    \
  1382.      INT32 a7,a8;                                            \
  1383.     while (tms34010_ICount > 0)                             \
  1384.     {                                                        \
  1385.         a2 = READ_INT32(a0);                                \
  1386.         if (!a2)                                            \
  1387.         {                                                    \
  1388.             cpu_spinuntil_int();                            \
  1389.             break;                                            \
  1390.         }                                                    \
  1391.         DO_SPEEDUP_LOOP(OFFS1, OFFS2, A8SIZE, A7SIZE);        \
  1392.     }
  1393.  
  1394.  
  1395. /* Speedup catch for games using 3 locations */
  1396.  
  1397. #define DO_SPEEDUP_LOOP_3(LOC1, LOC2, LOC3)                    \
  1398.                                                             \
  1399.     UINT32 a0,a2,temp1,temp2,temp3;                            \
  1400.     UINT32 a4 = 0;                                           \
  1401.      INT32 a1,a5,a7,a8;                                        \
  1402.                                                             \
  1403.     while (tms34010_ICount > 0)                             \
  1404.     {                                                        \
  1405.         temp1 = READ_INT32(LOC1);                            \
  1406.         temp2 = READ_INT32(LOC2);                            \
  1407.         temp3 = READ_INT32(LOC3);                            \
  1408.         if (!temp1 && !temp2 && !temp3)                        \
  1409.         {                                                    \
  1410.             cpu_spinuntil_int();                            \
  1411.             break;                                            \
  1412.         }                                                    \
  1413.         a0 = LOC1;                                            \
  1414.         a1 = 0x80000000;                                    \
  1415.         a5 = 0x80000000;                                    \
  1416.         do                                                    \
  1417.         {                                                    \
  1418.             a2 = READ_INT32(a0);                            \
  1419.             if (!a2)                                        \
  1420.             {                                                \
  1421.                 tms34010_ICount -= 20;                        \
  1422.                 break;                                        \
  1423.             }                                                \
  1424.             DO_SPEEDUP_LOOP(0xc0, 0xa0, INT32, INT32);        \
  1425.         } while (a2);                                        \
  1426.                                                             \
  1427.         a0 = LOC2;                                            \
  1428.         a1 = 0x80000000;                                    \
  1429.         a5 = 0x80000000;                                    \
  1430.         do                                                    \
  1431.         {                                                    \
  1432.             a2 = READ_INT32(a0);                            \
  1433.             if (!a2)                                        \
  1434.             {                                                \
  1435.                 tms34010_ICount -= 20;                        \
  1436.                 break;                                        \
  1437.             }                                                \
  1438.             DO_SPEEDUP_LOOP(0xc0, 0xa0, INT32, INT32);        \
  1439.         } while (a2);                                        \
  1440.                                                             \
  1441.         a0 = LOC3;                                            \
  1442.         a1 = 0x80000000;                                    \
  1443.         a5 = 0x80000000;                                    \
  1444.         do                                                    \
  1445.         {                                                    \
  1446.             a2 = READ_INT32(a0);                            \
  1447.             if (!a2)                                        \
  1448.             {                                                \
  1449.                 tms34010_ICount -= 20;                        \
  1450.                 break;                                        \
  1451.             }                                                \
  1452.             DO_SPEEDUP_LOOP(0xc0, 0xa0, INT32, INT32);        \
  1453.         } while (a2);                                        \
  1454.     }
  1455.  
  1456.  
  1457. static READ_HANDLER( narc_speedup_r )
  1458. {
  1459.     if (offset)
  1460.     {
  1461.         UINT32 value1 = READ_WORD(&SCRATCH_RAM[TOBYTE(0x1b310)]);
  1462.  
  1463.         /* Suspend cpu if it's waiting for an interrupt */
  1464.         if (cpu_get_pc() == 0xffde33e0 && !value1)
  1465.         {
  1466.             DO_SPEEDUP_LOOP_1(0x1000040, 0xc0, 0xa0, INT32, INT32);
  1467.         }
  1468.         return value1;
  1469.     }
  1470.     else
  1471.     {
  1472.         return READ_WORD(&SCRATCH_RAM[TOBYTE(0x1b300)]);
  1473.     }
  1474. }
  1475. static READ_HANDLER( smashtv_speedup_r )
  1476. {
  1477.     if (offset)
  1478.     {
  1479.         return READ_WORD(&SCRATCH_RAM[TOBYTE(0x86770)]);
  1480.     }
  1481.     else
  1482.     {
  1483.         UINT32 value1 = READ_WORD(&SCRATCH_RAM[TOBYTE(0x86760)]);
  1484.  
  1485.         /* Suspend cpu if it's waiting for an interrupt */
  1486.         if (cpu_get_pc() == 0xffe0a340 && !value1)
  1487.         {
  1488.             DO_SPEEDUP_LOOP_1(0x1000040, 0xa0, 0x80, INT16, INT32);
  1489.         }
  1490.         return value1;
  1491.     }
  1492. }
  1493. static READ_HANDLER( smashtv4_speedup_r )
  1494. {
  1495.     if (offset)
  1496.     {
  1497.         UINT32 value1 = READ_WORD(&SCRATCH_RAM[TOBYTE(0x86790)]);
  1498.  
  1499.         /* Suspend cpu if it's waiting for an interrupt */
  1500.         if (cpu_get_pc() == 0xffe0a320 && !value1)
  1501.         {
  1502.             DO_SPEEDUP_LOOP_1(0x1000040, 0xa0, 0x80, INT16, INT32);
  1503.         }
  1504.         return value1;
  1505.     }
  1506.     else
  1507.     {
  1508.         return READ_WORD(&SCRATCH_RAM[TOBYTE(0x86780)]);
  1509.     }
  1510. }
  1511. static READ_HANDLER( totcarn_speedup_r )
  1512. {
  1513.     if (offset)
  1514.     {
  1515.         return READ_WORD(&SCRATCH_RAM[TOBYTE(0x7ddf0)]);
  1516.     }
  1517.     else
  1518.     {
  1519.         UINT32 value1 = READ_WORD(&SCRATCH_RAM[TOBYTE(0x7dde0)]);
  1520.  
  1521.         /* Suspend cpu if it's waiting for an interrupt */
  1522.         if (cpu_get_pc() == 0xffc0c970 && !value1)
  1523.         {
  1524.             DO_SPEEDUP_LOOP_1(0x1000040, 0xa0, 0x90, INT16, INT16);
  1525.         }
  1526.         return value1;
  1527.     }
  1528. }
  1529. static READ_HANDLER( trogp_speedup_r )
  1530. {
  1531.     if (offset)
  1532.     {
  1533.         return READ_WORD(&SCRATCH_RAM[TOBYTE(0xa1ef0)]);
  1534.     }
  1535.     else
  1536.     {
  1537.         UINT32 value1 = READ_WORD(&SCRATCH_RAM[TOBYTE(0xa1ee0)]);
  1538.  
  1539.         /* Suspend cpu if it's waiting for an interrupt */
  1540.         if (cpu_get_pc() == 0xffe210d0 && !value1)
  1541.         {
  1542.             DO_SPEEDUP_LOOP_1(0x1000040, 0xc0, 0xa0, INT32, INT32);
  1543.         }
  1544.         return value1;
  1545.     }
  1546. }
  1547. static READ_HANDLER( trog_speedup_r )
  1548. {
  1549.     if (offset)
  1550.     {
  1551.         return READ_WORD(&SCRATCH_RAM[TOBYTE(0xa20b0)]);
  1552.     }
  1553.     else
  1554.     {
  1555.         UINT32 value1 = READ_WORD(&SCRATCH_RAM[TOBYTE(0xa20a0)]);
  1556.  
  1557.         /* Suspend cpu if it's waiting for an interrupt */
  1558.         if (cpu_get_pc() == 0xffe20630 && !value1)
  1559.         {
  1560.             DO_SPEEDUP_LOOP_1(0x1000040, 0xc0, 0xa0, INT32, INT32);
  1561.         }
  1562.         return value1;
  1563.     }
  1564. }
  1565. static READ_HANDLER( trog3_speedup_r )
  1566. {
  1567.     if (offset)
  1568.     {
  1569.         UINT32 value1 = READ_WORD(&SCRATCH_RAM[TOBYTE(0xa2090)]);
  1570.  
  1571.         /* Suspend cpu if it's waiting for an interrupt */
  1572.         if (cpu_get_pc() == 0xffe20660 && !value1)
  1573.         {
  1574.             DO_SPEEDUP_LOOP_1(0x1000040, 0xc0, 0xa0, INT32, INT32);
  1575.         }
  1576.         return value1;
  1577.     }
  1578.     else
  1579.     {
  1580.         return READ_WORD(&SCRATCH_RAM[TOBYTE(0xa2080)]);
  1581.     }
  1582. }
  1583. static READ_HANDLER( mk_speedup_r )
  1584. {
  1585.     if (offset)
  1586.     {
  1587.         return READ_WORD(&SCRATCH_RAM[TOBYTE(0x53370)]);
  1588.     }
  1589.     else
  1590.     {
  1591.         UINT32 value1 = READ_WORD(&SCRATCH_RAM[TOBYTE(0x53360)]);
  1592.  
  1593.         /* Suspend cpu if it's waiting for an interrupt */
  1594.         if (cpu_get_pc() == 0xffce2100 && !value1)
  1595.         {
  1596.             DO_SPEEDUP_LOOP_3(0x104f9d0, 0x104fa10, 0x104fa30);
  1597.         }
  1598.         return value1;
  1599.     }
  1600. }
  1601. static READ_HANDLER( mkla1_speedup_r )
  1602. {
  1603.     if (offset)
  1604.     {
  1605.         return READ_WORD(&SCRATCH_RAM[TOBYTE(0x4f010)]);
  1606.     }
  1607.     else
  1608.     {
  1609.         UINT32 value1 = READ_WORD(&SCRATCH_RAM[TOBYTE(0x4f000)]);
  1610.  
  1611.         /* Suspend cpu if it's waiting for an interrupt */
  1612.         if (cpu_get_pc() == 0xffcddc00 && !value1)
  1613.         {
  1614.             DO_SPEEDUP_LOOP_3(0x104b6b0, 0x104b6f0, 0x104b710);
  1615.         }
  1616.         return value1;
  1617.     }
  1618. }
  1619. static READ_HANDLER( mkla2_speedup_r )
  1620. {
  1621.     if (offset)
  1622.     {
  1623.         return READ_WORD(&SCRATCH_RAM[TOBYTE(0x4f030)]);
  1624.     }
  1625.     else
  1626.     {
  1627.         UINT32 value1 = READ_WORD(&SCRATCH_RAM[TOBYTE(0x4f020)]);
  1628.  
  1629.         /* Suspend cpu if it's waiting for an interrupt */
  1630.         if (cpu_get_pc() == 0xffcde000 && !value1)
  1631.         {
  1632.             DO_SPEEDUP_LOOP_3(0x104b6b0, 0x104b6f0, 0x104b710);
  1633.         }
  1634.         return value1;
  1635.     }
  1636. }
  1637. static READ_HANDLER( mkla3_speedup_r )
  1638. {
  1639.     if (offset)
  1640.     {
  1641.         return READ_WORD(&SCRATCH_RAM[TOBYTE(0x4f050)]);
  1642.     }
  1643.     else
  1644.     {
  1645.         UINT32 value1 = READ_WORD(&SCRATCH_RAM[TOBYTE(0x4f040)]);
  1646.  
  1647.         /* Suspend cpu if it's waiting for an interrupt */
  1648.         if (cpu_get_pc() == 0xffce1ec0 && !value1)
  1649.         {
  1650.             DO_SPEEDUP_LOOP_3(0x104b6b0, 0x104b6f0, 0x104b710);
  1651.         }
  1652.         return value1;
  1653.     }
  1654. }
  1655. static READ_HANDLER( mkla4_speedup_r )
  1656. {
  1657.     if (!offset)
  1658.     {
  1659.         return READ_WORD(&SCRATCH_RAM[TOBYTE(0x4f040)]);
  1660.     }
  1661.     else
  1662.     {
  1663.         UINT32 value1 = READ_WORD(&SCRATCH_RAM[TOBYTE(0x4f050)]);
  1664.  
  1665.         /* Suspend cpu if it's waiting for an interrupt */
  1666.         if (cpu_get_pc() == 0xffce21d0 && !value1)
  1667.         {
  1668.             DO_SPEEDUP_LOOP_3(0x104b6b0, 0x104b6f0, 0x104b710);
  1669.         }
  1670.         return value1;
  1671.     }
  1672. }
  1673. static READ_HANDLER( hiimpact_speedup_r )
  1674. {
  1675.     if (!offset)
  1676.     {
  1677.         return READ_WORD(&SCRATCH_RAM[TOBYTE(0x53140)]);
  1678.     }
  1679.     else
  1680.     {
  1681.         UINT32 value1 = READ_WORD(&SCRATCH_RAM[TOBYTE(0x53150)]);
  1682.  
  1683.         /* Suspend cpu if it's waiting for an interrupt */
  1684.         if (cpu_get_pc() == 0xffe28bb0 && !value1)
  1685.         {
  1686.             DO_SPEEDUP_LOOP_3(0x1000080, 0x10000a0, 0x10000c0);
  1687.         }
  1688.         return value1;
  1689.     }
  1690. }
  1691. static READ_HANDLER( shimpact_speedup_r )
  1692. {
  1693.     if (!offset)
  1694.     {
  1695.         return READ_WORD(&SCRATCH_RAM[TOBYTE(0x52060)]);
  1696.     }
  1697.     else
  1698.     {
  1699.         UINT32 value1 = READ_WORD(&SCRATCH_RAM[TOBYTE(0x52070)]);
  1700.  
  1701.         /* Suspend cpu if it's waiting for an interrupt */
  1702.         if (cpu_get_pc() == 0xffe27f00 && !value1)
  1703.         {
  1704.             DO_SPEEDUP_LOOP_3(0x1000000, 0x1000020, 0x1000040);
  1705.         }
  1706.         return value1;
  1707.     }
  1708. }
  1709.  
  1710. #define T2_FFC08C40                                                                \
  1711.     a5x = (INT32)(READ_INT8(a1+0x2d0));                /* MOVB   *A1(2D0h),A5  */  \
  1712.     WRITE_INT8(a1+0x2d0, a2 & 0xff);                /* MOVB   A2,*A1(2D0h)  */  \
  1713.     a3x = 0xf0;                                        /* MOVI   F0h,A3        */    \
  1714.     a5x = (UINT32)a5x * (UINT32)a3x;                /* MPYU   A3,A5            */    \
  1715.     a5x += 0x1008000;                                /* ADDI   1008000h,A5    */  \
  1716.     a3x = (UINT32)a2  * (UINT32)a3x;                /* MPYU   A2,A3            */    \
  1717.     a3x += 0x1008000;                                /* ADDI   1008000h,A3    */  \
  1718.     a7x = (INT32)(READ_INT16(a1+0x190));            /* MOVE   *A1(190h),A7,0*/    \
  1719.     a6x = (INT32)(READ_INT16(a5x+0x50));            /* MOVE   *A5(50h),A6,0 */    \
  1720.     a7x -= a6x;                                        /* SUB    A6,A7            */  \
  1721.     a6x = (INT32)(READ_INT16(a3x+0x50));            /* MOVE   *A3(50h),A6,0 */    \
  1722.     a7x += a6x;                                        /* ADD    A6,A7            */  \
  1723.     WRITE_INT16(a1+0x190, a7x & 0xffff);            /* MOVE   A7,*A1(190h),0*/    \
  1724.     a5x = READ_INT32(a5x+0xa0);                        /* MOVE   *A5(A0h),A5,1 */    \
  1725.     a3x = READ_INT32(a3x+0xa0);                        /* MOVE   *A3(A0h),A3,1 */    \
  1726.     a6x = READ_INT32(a1+0x140);                        /* MOVE   *A1(140h),A6,1*/    \
  1727.     a6xa7x = (INT64)a6x * a3x / a5x;                /* MPYS   A3,A6            */  \
  1728.                                                     /* DIVS   A5,A6            */  \
  1729.     WRITE_INT32(a1+0x140, a6xa7x & 0xffffffff);        /* MOVE   A6,*A1(140h),1*/
  1730.  
  1731. static READ_HANDLER( term2_speedup_r )
  1732. {
  1733.     if (offset)
  1734.     {
  1735.         return READ_WORD(&SCRATCH_RAM[TOBYTE(0xaa050)]);
  1736.     }
  1737.     else
  1738.     {
  1739.         UINT32 value1 = READ_WORD(&SCRATCH_RAM[TOBYTE(0xaa040)]);
  1740.  
  1741.         /* Suspend cpu if it's waiting for an interrupt */
  1742.         if (cpu_get_pc() == 0xffcdc270 && !value1)
  1743.         {
  1744.             INT32 a0,a1,a2,a3,a4,a5,a6,a7,a8,a9,a10,a14,b0,b1,b2;
  1745.             INT32 a3x,a5x,a6x,a7x;
  1746.             INT64 a6xa7x;
  1747.  
  1748.             b1 = 0;                                                 /* CLR    B1 */
  1749.             b2 = (INT32)(READ_INT16(0x100F640));                /* MOVE   @100F640h,B2,0 */
  1750.             if (!b2)                                            /* JREQ   FFC029F0h */
  1751.             {
  1752.                 cpu_spinuntil_int();
  1753.                 return value1;
  1754.             }
  1755.             b2--;                                                /* DEC    B2 */
  1756.             b0  = 0x01008000;                                    /* MOVI   1008000h,B0 */
  1757.             a4  = 0x7fffffff;                                    /* MOVI   7FFFFFFFh,A4 */
  1758.  
  1759.             while (1)
  1760.             {
  1761.                 /* FFC07770 */
  1762.                 a10 = b0;                                        /* MOVE   B0,A10 */
  1763.                 a0  = a10;                                        /* MOVE   A10,A0 */
  1764.                 a3  = a4;                                        /* MOVE   A4,A3 */
  1765.                                                                 /* CMP    B2,B1 */
  1766.                 if (b1 < b2)                                    /* JRLT   FFC07800h */
  1767.                 {
  1768.                     /* FFC07800 */
  1769.                     a4 = (INT32)(READ_INT16(a10+0xc0));            /* MOVE   *A10(C0h),A4,0 */
  1770.                     a4 <<= 16;                                    /* SLL    10h,A4 */
  1771.                 }
  1772.                 else
  1773.                 {
  1774.                     /* FFC077C0 */
  1775.                     a4 = 0x80000000;                            /* MOVI   80000000h,A4 */
  1776.                 }                                                /* JR     FFC07830h */
  1777.  
  1778.                 /* FFC07830 */
  1779.                 b0 += 0xf0;                                        /* ADDI   F0h,B0 */
  1780.                 a6 = 0x80000000;                                /* MOVI   80000000h,A6 */
  1781.                 a5 = 0x80000000;                                /* MOVI   80000000h,A5 */
  1782.                 goto t2_FFC07DD0;                                /* JR     FFC07DD0h */
  1783.  
  1784.             t2_FFC078C0:
  1785.                 a8  = READ_INT32(a1+0x1c0);                        /* MOVE   *A1(1C0h),A8,1 */
  1786.                 a7  = READ_INT32(a1+0x1a0);                        /* MOVE   *A1(1A0h),A7,1 */
  1787.                 a14 = (INT32)(READ_INT16(a1+0x220));            /* MOVE   *A1(220h),A14,0 */
  1788.                 if (a14 & 0x6000)                                /* BTST   Eh,A14 */
  1789.                 {                                                /* JRNE   FFC07C50h */
  1790.                     goto t2_FFC07C50;                            /* BTST   Dh,A14 */
  1791.                 }                                                /* JRNE   FFC07C50h */
  1792.  
  1793.                 if (a8 <= a3)                                    /* CMP    A3,A8 */
  1794.                 {
  1795.                     goto t2_FFC07AE0;                            /* JRLE   FFC07AE0h */
  1796.                 }
  1797.  
  1798.                 a2 = b1 - 1;                                    /* MOVE   B1,A2;  DEC    A2 */
  1799.                 T2_FFC08C40                                        /* CALLR  FFC08C40h */
  1800.                 a14 = READ_INT32(a1);                            /* MOVE   *A1,A14,1 */
  1801.                 WRITE_INT32(a0, a14);                            /* MOVE   A14,*A0,1 */
  1802.                 WRITE_INT32(a14+0x20, a0);                        /* MOVE   A0,*A14(20h),1 */
  1803.                 a14 = b0 - 0x1e0;                                /* MOVE   B0,A14; SUBI   1E0h,A14 */
  1804.                 WRITE_INT32(a1+0x20, a14);                        /* MOVE   A14,*A1(20h),1 */
  1805.                 a9 = READ_INT32(a14);                            /* MOVE   *A14,A9,1 */
  1806.                 WRITE_INT32(a14, a1);                            /* MOVE   A1,*A14,1 */
  1807.                 WRITE_INT32(a9+0x20, a1);                        /* MOVE   A1,*A9(20h),1 */
  1808.                 WRITE_INT32(a1, a9);                            /* MOVE   A9,*A1,1 */
  1809.                 goto t2_FFC07DD0;                                /* JR     FFC07DD0h */
  1810.  
  1811.             t2_FFC07AE0:
  1812.                 if (a8 >= a4)                                    /* CMP    A4,A8 */
  1813.                 {
  1814.                     goto t2_FFC07C50;                            /* JRGE   FFC07C50h */
  1815.                 }
  1816.  
  1817.                 a2 = b1 + 1;                                    /* MOVE   B1,A2; INC    A2 */
  1818.                 T2_FFC08C40                                        /* CALLR  FFC08C40h */
  1819.                 a14 = READ_INT32(a1);                            /* MOVE   *A1,A14,1 */
  1820.                 WRITE_INT32(a0, a14);                            /* MOVE   A14,*A0,1 */
  1821.                 WRITE_INT32(a14+0x20, a0);                        /* MOVE   A0,*A14(20h),1 */
  1822.                 a14 = b0;                                        /* MOVE   B0,A14 */
  1823.                 a9 = READ_INT32(a14+0x20);                        /* MOVE   *A14(20h),A9,1 */
  1824.                 WRITE_INT32(a1, a14);                            /* MOVE   A14,*A1,1 */
  1825.                 WRITE_INT32(a14+0x20, a1);                        /* MOVE   A1,*A14(20h),1 */
  1826.                 WRITE_INT32(a9, a1);                            /* MOVE   A1,*A9,1 */
  1827.                 WRITE_INT32(a1+0x20, a9);                        /* MOVE   A9,*A1(20h),1 */
  1828.                 goto t2_FFC07DD0;
  1829.  
  1830.             t2_FFC07C50:
  1831.                 if (a8 > a6)                                     /* CMP    A6,A8 */
  1832.                 {
  1833.                     a1 = a0;                                     /* MOVE   A1,A0 */
  1834.                     a6 = a8;                                     /* MOVE   A8,A6 */
  1835.                     a5 = a7;                                     /* MOVE   A7,A5 */
  1836.                     goto t2_FFC07DD0;
  1837.                 }
  1838.  
  1839.                 if ((a8 == a6) && (a7 >= a5))                     /* CMP    A5,A7 */
  1840.                 {
  1841.                     a1 = a0;                                     /* MOVE   A1,A0 */
  1842.                     a6 = a8;                                     /* MOVE   A8,A6 */
  1843.                     a5 = a7;                                     /* MOVE   A7,A5 */
  1844.                     goto t2_FFC07DD0;
  1845.                 }
  1846.  
  1847.                 /* FFC07CC0 */
  1848.                 a14 = READ_INT32(a0+0x20);                        /* MOVE   *A0(20h),A14,1 */
  1849.                 WRITE_INT32(a14, a1);                            /* MOVE   A1,*A14,1 */
  1850.                 WRITE_INT32(a1+0x20, a14);                        /* MOVE   A14,*A1(20h),1 */
  1851.                 a14 = READ_INT32(a1);                            /* MOVE   *A1,A14,1 */
  1852.                 WRITE_INT32(a0, a14);                            /* MOVE   A14,*A0,1 */
  1853.                 WRITE_INT32(a1, a0);                            /* MOVE   A0,*A1,1 */
  1854.                 WRITE_INT32(a0 +0x20, a1);                        /* MOVE   A1,*A0(20h),1 */
  1855.                 WRITE_INT32(a14+0x20, a0);                        /* MOVE   A0,*A14(20h),1 */
  1856.  
  1857.             t2_FFC07DD0:
  1858.                 BURN_TIME(50);
  1859.                 if (tms34010_ICount <= 0)
  1860.                 {
  1861.                     break;
  1862.                 }
  1863.  
  1864.                 a1 = READ_INT32(a0);                            /* MOVE   *A0,A1,1 */
  1865.                 if (a10 != a1)                                    /* CMP    A1,A10 */
  1866.                 {
  1867.                     goto t2_FFC078C0;                            /* JRNE   FFC078C0h */
  1868.                 }
  1869.  
  1870.                 b1++;                                            /* INC    B1 */
  1871.                 if (b1 > b2)                                    /* CMP    B2,B1 */
  1872.                 {
  1873.                     cpu_spinuntil_int();
  1874.                     return value1;                                /* JRLE   FFC07770h; RTS */
  1875.                 }
  1876.             }
  1877.         }
  1878.  
  1879.         return value1;
  1880.     }
  1881. }
  1882. READ_HANDLER( strkforc_speedup_r )
  1883. {
  1884.     if (!offset)
  1885.     {
  1886.         return READ_WORD(&SCRATCH_RAM[TOBYTE(0x71dc0)]);
  1887.     }
  1888.     else
  1889.     {
  1890.         UINT32 value1 = READ_WORD(&SCRATCH_RAM[TOBYTE(0x71dd0)]);
  1891.  
  1892.         /* Suspend cpu if it's waiting for an interrupt */
  1893.         if (cpu_get_pc() == 0xffe0a290 && !value1)
  1894.         {
  1895.             DO_SPEEDUP_LOOP_1(0x1000060, 0xc0, 0xa0, INT32, INT32);
  1896.         }
  1897.         return value1;
  1898.     }
  1899. }
  1900. static READ_HANDLER( mk2_speedup_r )
  1901. {
  1902.     if (!offset)
  1903.     {
  1904.         return READ_WORD(&SCRATCH_RAM[TOBYTE(0x68e60)]);
  1905.     }
  1906.     else
  1907.     {
  1908.         UINT32 value1 = READ_WORD(&SCRATCH_RAM[TOBYTE(0x68e70)]);
  1909.  
  1910.         /* Suspend cpu if it's waiting for an interrupt */
  1911.         if (cpu_get_pc() == 0xff80db70 && !value1)
  1912.         {
  1913.             DO_SPEEDUP_LOOP_3(0x105d480, 0x105d4a0, 0x105d4c0);
  1914.         }
  1915.         return value1;
  1916.     }
  1917. }
  1918. static READ_HANDLER( mk2r14_speedup_r )
  1919. {
  1920.     if (offset)
  1921.     {
  1922.         return READ_WORD(&SCRATCH_RAM[TOBYTE(0x68df0)]);
  1923.     }
  1924.     else
  1925.     {
  1926.         UINT32 value1 = READ_WORD(&SCRATCH_RAM[TOBYTE(0x68de0)]);
  1927.  
  1928.         /* Suspend cpu if it's waiting for an interrupt */
  1929.         if (cpu_get_pc() == 0xff80d960 && !value1)
  1930.         {
  1931.             DO_SPEEDUP_LOOP_3(0x105d480, 0x105d4a0, 0x105d4c0);
  1932.         }
  1933.         return value1;
  1934.     }
  1935. }
  1936. static READ_HANDLER( nbajam_speedup_r )
  1937. {
  1938.     if (offset)
  1939.     {
  1940.         return READ_WORD(&SCRATCH_RAM[TOBYTE(0x754d0)]);
  1941.     }
  1942.     else
  1943.     {
  1944.         UINT32 value1 = READ_WORD(&SCRATCH_RAM[TOBYTE(0x754c0)]);
  1945.  
  1946.         /* Suspend cpu if it's waiting for an interrupt */
  1947.         if (cpu_get_pc() == 0xff833480 && !value1)
  1948.         {
  1949.             DO_SPEEDUP_LOOP_1(0x1008040, 0xd0, 0xb0, INT16, INT16);
  1950.         }
  1951.         return value1;
  1952.     }
  1953. }
  1954.  
  1955. static void remove_access_errors(void)
  1956. {
  1957.     /* get rid of unmapped access errors during tests */
  1958.     install_mem_write_handler(0, TOBYTE(0x00200000), TOBYTE(0x0020003f), MWA_NOP);
  1959.     install_mem_write_handler(0, TOBYTE(0x01100000), TOBYTE(0x0110003f), MWA_NOP);
  1960.     install_mem_read_handler(0, TOBYTE(0x00200000), TOBYTE(0x0020003f), MRA_NOP);
  1961.     install_mem_read_handler(0, TOBYTE(0x01100000), TOBYTE(0x0110003f), MRA_NOP);
  1962. }
  1963.  
  1964.  
  1965. static void load_gfx_roms_4bit(void)
  1966. {
  1967.     int i;
  1968.     UINT8 d1,d2,d3,d4;
  1969.     UINT8 *mem_rom;
  1970.     memset(GFX_ROM,0,wms_gfx_rom_size);
  1971.     mem_rom = memory_region(REGION_GFX1);
  1972.     /* load the graphics ROMs -- quadruples 2 bits each */
  1973.     for (i=0;i<wms_gfx_rom_size;i+=2)
  1974.     {
  1975.         d1 = ((mem_rom[                      (i  )/4])>>(2*((i  )%4)))&0x03;
  1976.         d2 = ((mem_rom[wms_gfx_rom_size/4+(i  )/4])>>(2*((i  )%4)))&0x03;
  1977.         d3 = ((mem_rom[                      (i+1)/4])>>(2*((i+1)%4)))&0x03;
  1978.         d4 = ((mem_rom[wms_gfx_rom_size/4+(i+1)/4])>>(2*((i+1)%4)))&0x03;
  1979.         WRITE_WORD(&GFX_ROM[i],d1|(d2<<2)|(d1<<4)|(d2<<6)|(d3<<8)|(d4<<10)|(d3<<12)|(d4<<14));
  1980.     }
  1981.     free_memory_region(REGION_GFX1);
  1982. }
  1983. static void load_gfx_roms_6bit(void)
  1984. {
  1985.     int i;
  1986.     UINT8 d1,d2,d3,d4,d5,d6;
  1987.     UINT8 *mem_rom;
  1988.     memset(GFX_ROM,0,wms_gfx_rom_size);
  1989.     mem_rom = memory_region(REGION_GFX1);
  1990.     /* load the graphics ROMs -- quadruples 2 bits each */
  1991.     for (i=0;i<wms_gfx_rom_size;i+=2)
  1992.     {
  1993.         d1 = ((mem_rom[                        (i  )/4])>>(2*((i  )%4)))&0x03;
  1994.         d2 = ((mem_rom[  wms_gfx_rom_size/4+(i  )/4])>>(2*((i  )%4)))&0x03;
  1995.         d3 = ((mem_rom[2*wms_gfx_rom_size/4+(i  )/4])>>(2*((i  )%4)))&0x03;
  1996.         d4 = ((mem_rom[                        (i+1)/4])>>(2*((i+1)%4)))&0x03;
  1997.         d5 = ((mem_rom[  wms_gfx_rom_size/4+(i+1)/4])>>(2*((i+1)%4)))&0x03;
  1998.         d6 = ((mem_rom[2*wms_gfx_rom_size/4+(i+1)/4])>>(2*((i+1)%4)))&0x03;
  1999.         WRITE_WORD(&GFX_ROM[i],d1|(d2<<2)|(d3<<4)|(d4<<8)|(d5<<10)|(d6<<12));
  2000.     }
  2001.     free_memory_region(REGION_GFX1);
  2002. }
  2003. static void load_gfx_roms_8bit(void)
  2004. {
  2005.     int i;
  2006.     UINT8 d1,d2;
  2007.     UINT8 *mem_rom;
  2008.     memset(GFX_ROM,0,wms_gfx_rom_size);
  2009.     mem_rom = memory_region(REGION_GFX1);
  2010.     /* load the graphics ROMs -- quadruples */
  2011.     for (i=0;i<wms_gfx_rom_size;i+=4)
  2012.     {
  2013.         d1 = mem_rom[                      i/4];
  2014.         d2 = mem_rom[  wms_gfx_rom_size/4+i/4];
  2015.         WRITE_WORD(&GFX_ROM[i  ],(UINT32)((UINT32)(d1) | ((UINT32)(d2)<<8)));
  2016.         d1 = mem_rom[2*wms_gfx_rom_size/4+i/4];
  2017.         d2 = mem_rom[3*wms_gfx_rom_size/4+i/4];
  2018.         WRITE_WORD(&GFX_ROM[i+2],(UINT32)((UINT32)(d1) | ((UINT32)(d2)<<8)));
  2019.     }
  2020.     free_memory_region(REGION_GFX1);
  2021. }
  2022.  
  2023. static void load_adpcm_roms_512k(void)
  2024. {
  2025.     UINT8 *base = memory_region(REGION_SOUND1);
  2026.  
  2027.     memcpy(base + 0xa0000, base + 0x20000, 0x20000);
  2028.     memcpy(base + 0x80000, base + 0x60000, 0x20000);
  2029.     memcpy(base + 0x60000, base + 0x20000, 0x20000);
  2030. }
  2031.  
  2032. static void wms_modify_pen(int i, int rgb)
  2033. {
  2034.     extern UINT16 *shrinked_pens;
  2035.  
  2036. #define rgbpenindex(r,g,b) ((Machine->scrbitmap->depth==16) ? ((((r)>>3)<<10)+(((g)>>3)<<5)+((b)>>3)) : ((((r)>>5)<<5)+(((g)>>5)<<2)+((b)>>6)))
  2037.  
  2038.     int r,g,b;
  2039.  
  2040.     r = (rgb >> 10) & 0x1f;
  2041.     g = (rgb >>  5) & 0x1f;
  2042.     b = (rgb >>  0) & 0x1f;
  2043.  
  2044.     r = (r << 3) | (r >> 2);
  2045.     g = (g << 3) | (g >> 2);
  2046.     b = (b << 3) | (b >> 2);
  2047.  
  2048.     Machine->pens[i] = shrinked_pens[rgbpenindex(r,g,b)];
  2049. }
  2050.  
  2051. static WRITE_HANDLER( wms_8bit_t_paletteram_xRRRRRGGGGGBBBBB_word_w )
  2052. {
  2053.     int i;
  2054.     int oldword = READ_WORD(&paletteram[offset]);
  2055.     int newword = COMBINE_WORD(oldword,data);
  2056.  
  2057.     int base = offset / 2;
  2058.  
  2059.     WRITE_WORD(&paletteram[offset],newword);
  2060.  
  2061.     for (i = 0; i < 1; i++)
  2062.     {
  2063.         wms_modify_pen(base | (i << 16), newword);
  2064.     }
  2065. }
  2066.  
  2067. static WRITE_HANDLER( wms_8bit_paletteram_xRRRRRGGGGGBBBBB_word_w )
  2068. {
  2069.     int i;
  2070.     int oldword = READ_WORD(&paletteram[offset]);
  2071.     int newword = COMBINE_WORD(oldword,data);
  2072.  
  2073.     int base = offset / 2;
  2074.  
  2075.     WRITE_WORD(&paletteram[offset],newword);
  2076.  
  2077.     for (i = 0; i < 8; i++)
  2078.     {
  2079.         wms_modify_pen(base | (i << 13), newword);
  2080.     }
  2081. }
  2082.  
  2083. static WRITE_HANDLER( wms_6bit_paletteram_xRRRRRGGGGGBBBBB_word_w )
  2084. {
  2085.     /*
  2086.      * the palette entry to find is mapped like this:
  2087.      * Bit 15 - Not Used
  2088.      * Bit 14 - Not Used
  2089.      * Bit 13 - Not Used
  2090.      * Bit 12 - Not Used
  2091.      * Bit 11 - PAL Bit 03
  2092.      * Bit 10 - PAL Bit 02
  2093.      * Bit 09 - PAL Bit 01
  2094.      * Bit 08 - PAL Bit 00
  2095.      * Bit 07 - PAL Bit 07
  2096.      * Bit 06 - PAL Bit 06
  2097.      * Bit 05 - DATA Bit 05
  2098.      * Bit 04 - DATA Bit 04
  2099.      * Bit 03 - DATA Bit 03
  2100.      * Bit 02 - DATA Bit 02
  2101.      * Bit 01 - DATA Bit 01
  2102.      * Bit 00 - DATA Bit 00
  2103.      */
  2104.  
  2105.     int i;
  2106.     int oldword = READ_WORD(&paletteram[offset]);
  2107.     int newword = COMBINE_WORD(oldword,data);
  2108.  
  2109.     int base = offset / 2;
  2110.     base = (base & 0xf3f) | ((base & 0xc0) << 8);
  2111.  
  2112.     WRITE_WORD(&paletteram[offset],newword);
  2113.  
  2114.     for (i = 0; i < 16; i++)
  2115.     {
  2116.         wms_modify_pen(base | ((i & 3) << 6) | ((i & 0x0c) << 10), newword);
  2117.     }
  2118. }
  2119.  
  2120. static WRITE_HANDLER( wms_4bit_paletteram_xRRRRRGGGGGBBBBB_word_w )
  2121. {
  2122.     /*
  2123.      * the palette entry to find is mapped like this:
  2124.      * Bit 07 - PAL Bit 07
  2125.      * Bit 06 - PAL Bit 06
  2126.      * Bit 05 - PAL Bit 05
  2127.      * Bit 04 - PAL Bit 04
  2128.      * Bit 03 - DATA Bit 03
  2129.      * Bit 02 - DATA Bit 02
  2130.      * Bit 01 - DATA Bit 01
  2131.      * Bit 00 - DATA Bit 00
  2132.      */
  2133.  
  2134.     int i;
  2135.     int oldword = READ_WORD(&paletteram[offset]);
  2136.     int newword = COMBINE_WORD(oldword,data);
  2137.  
  2138.     int base = offset / 2;
  2139.     base = (base & 0x0f) | ((base & 0xf0) << 8);
  2140.  
  2141.     WRITE_WORD(&paletteram[offset],newword);
  2142.  
  2143.     for (i = 0; i < 256; i++)
  2144.     {
  2145.         wms_modify_pen(base | (i << 4), newword);
  2146.     }
  2147. }
  2148.  
  2149. static void init_8bit_t(void)
  2150. {
  2151.     install_mem_write_handler(0, TOBYTE(0x01800000), TOBYTE(0x018fffff), wms_8bit_t_paletteram_xRRRRRGGGGGBBBBB_word_w);
  2152.     install_mem_read_handler (0, TOBYTE(0x01800000), TOBYTE(0x018fffff), paletteram_word_r);
  2153. }
  2154. static void init_8bit(void)
  2155. {
  2156.     install_mem_write_handler(0, TOBYTE(0x01800000), TOBYTE(0x0181ffff), wms_8bit_paletteram_xRRRRRGGGGGBBBBB_word_w);
  2157.     install_mem_read_handler (0, TOBYTE(0x01800000), TOBYTE(0x0181ffff), paletteram_word_r);
  2158. }
  2159. static void init_6bit(void)
  2160. {
  2161.     install_mem_write_handler(0, TOBYTE(0x01810000), TOBYTE(0x0181ffff), wms_6bit_paletteram_xRRRRRGGGGGBBBBB_word_w);
  2162.     install_mem_read_handler (0, TOBYTE(0x01810000), TOBYTE(0x0181ffff), paletteram_word_r);
  2163. }
  2164. static void init_4bit(void)
  2165. {
  2166.     install_mem_write_handler(0, TOBYTE(0x0181f000), TOBYTE(0x0181ffff), wms_4bit_paletteram_xRRRRRGGGGGBBBBB_word_w);
  2167.     install_mem_read_handler (0, TOBYTE(0x0181f000), TOBYTE(0x0181ffff), paletteram_word_r);
  2168. }
  2169.  
  2170. /* driver_init functions */
  2171.  
  2172. void init_narc(void)
  2173. {
  2174.     /* set up speedup loops */
  2175.     install_mem_read_handler(0, TOBYTE(0x0101b300), TOBYTE(0x0101b31f), narc_speedup_r);
  2176.  
  2177.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x1000000));
  2178.     wms_autoerase_reset = 1;
  2179.  
  2180.     /* This just causes the init_machine to copy the images again */
  2181.     wms_rom_loaded = 0;
  2182. }
  2183. void init_trog(void)
  2184. {
  2185.     /* set up speedup loops */
  2186.     install_mem_read_handler(0, TOBYTE(0x010a20a0), TOBYTE(0x010a20bf), trog_speedup_r);
  2187.     wms_protect_s = 0xffe47c40;
  2188.     wms_protect_d = 0xffe47af0;
  2189.  
  2190.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x1000000));
  2191.     wms_autoerase_reset = 0;
  2192.  
  2193.     /* expand the sound ROMs */
  2194.     memcpy(&memory_region(REGION_CPU2)[0x20000], &memory_region(REGION_CPU2)[0x10000], 0x10000);
  2195.     memcpy(&memory_region(REGION_CPU2)[0x40000], &memory_region(REGION_CPU2)[0x30000], 0x10000);
  2196.     memcpy(&memory_region(REGION_CPU2)[0x60000], &memory_region(REGION_CPU2)[0x50000], 0x10000);
  2197.  
  2198.     /* This just causes the init_machine to copy the images again */
  2199.     wms_rom_loaded = 0;
  2200. }
  2201. void init_trog3(void)
  2202. {
  2203.     /* set up speedup loops */
  2204.     install_mem_read_handler(0, TOBYTE(0x010a2080), TOBYTE(0x010a209f), trog3_speedup_r);
  2205.     wms_protect_s = 0xffe47c70;
  2206.     wms_protect_d = 0xffe47b20;
  2207.  
  2208.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x1000000));
  2209.     wms_autoerase_reset = 0;
  2210.  
  2211.     /* expand the sound ROMs */
  2212.     memcpy(&memory_region(REGION_CPU2)[0x20000], &memory_region(REGION_CPU2)[0x10000], 0x10000);
  2213.     memcpy(&memory_region(REGION_CPU2)[0x40000], &memory_region(REGION_CPU2)[0x30000], 0x10000);
  2214.     memcpy(&memory_region(REGION_CPU2)[0x60000], &memory_region(REGION_CPU2)[0x50000], 0x10000);
  2215.  
  2216.     /* This just causes the init_machine to copy the images again */
  2217.     wms_rom_loaded = 0;
  2218. }
  2219. void init_trogp(void)
  2220. {
  2221.     /* set up speedup loops */
  2222.     install_mem_read_handler(0, TOBYTE(0x010a1ee0), TOBYTE(0x010a1eff), trogp_speedup_r);
  2223.  
  2224.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x1000000));
  2225.     wms_autoerase_reset = 0;
  2226.  
  2227.     /* expand the sound ROMs */
  2228.     memcpy(&memory_region(REGION_CPU2)[0x20000], &memory_region(REGION_CPU2)[0x10000], 0x10000);
  2229.     memcpy(&memory_region(REGION_CPU2)[0x40000], &memory_region(REGION_CPU2)[0x30000], 0x10000);
  2230.     memcpy(&memory_region(REGION_CPU2)[0x60000], &memory_region(REGION_CPU2)[0x50000], 0x10000);
  2231.  
  2232.     /* This just causes the init_machine to copy the images again */
  2233.     wms_rom_loaded = 0;
  2234. }
  2235. void init_smashtv(void)
  2236. {
  2237.     /* set up speedup loops */
  2238.     install_mem_read_handler(0, TOBYTE(0x01086760), TOBYTE(0x0108677f), smashtv_speedup_r);
  2239.  
  2240.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x01000000));
  2241.     wms_autoerase_reset = 0;
  2242.  
  2243.     /* expand the sound ROMs */
  2244.     memcpy(&memory_region(REGION_CPU2)[0x20000], &memory_region(REGION_CPU2)[0x10000], 0x10000);
  2245.     memcpy(&memory_region(REGION_CPU2)[0x40000], &memory_region(REGION_CPU2)[0x30000], 0x10000);
  2246.     memcpy(&memory_region(REGION_CPU2)[0x60000], &memory_region(REGION_CPU2)[0x50000], 0x10000);
  2247.  
  2248.     /* This just causes the init_machine to copy the images again */
  2249.     wms_rom_loaded = 0;
  2250. }
  2251. void init_smashtv4(void)
  2252. {
  2253.     /* set up speedup loops */
  2254.     install_mem_read_handler(0, TOBYTE(0x01086780), TOBYTE(0x0108679f), smashtv4_speedup_r);
  2255.  
  2256.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x01000000));
  2257.     wms_autoerase_reset = 0;
  2258.  
  2259.     /* expand the sound ROMs */
  2260.     memcpy(&memory_region(REGION_CPU2)[0x20000], &memory_region(REGION_CPU2)[0x10000], 0x10000);
  2261.     memcpy(&memory_region(REGION_CPU2)[0x40000], &memory_region(REGION_CPU2)[0x30000], 0x10000);
  2262.     memcpy(&memory_region(REGION_CPU2)[0x60000], &memory_region(REGION_CPU2)[0x50000], 0x10000);
  2263.  
  2264.     /* This just causes the init_machine to copy the images again */
  2265.     wms_rom_loaded = 0;
  2266. }
  2267. void init_hiimpact(void)
  2268. {
  2269.     /* set up speedup loops */
  2270.     install_mem_read_handler(0, TOBYTE(0x01053140), TOBYTE(0x0105315f), hiimpact_speedup_r);
  2271.     wms_protect_s = 0xffe77c20;
  2272.     wms_protect_d = 0xffe77ad0;
  2273.  
  2274.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x1000000));
  2275.     wms_autoerase_reset = 0;
  2276.  
  2277.     /* This just causes the init_machine to copy the images again */
  2278.     wms_rom_loaded = 0;
  2279. }
  2280. void init_shimpact(void)
  2281. {
  2282.     /* set up speedup loops */
  2283.     install_mem_read_handler(0, TOBYTE(0x01052060), TOBYTE(0x0105207f), shimpact_speedup_r);
  2284.     wms_protect_s = 0xffe07a40;
  2285.     wms_protect_d = 0xffe078f0;
  2286.  
  2287.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x1000000));
  2288.     wms_autoerase_reset = 0;
  2289.  
  2290.     /* This just causes the init_machine to copy the images again */
  2291.     wms_rom_loaded = 0;
  2292. }
  2293. void init_strkforc(void)
  2294. {
  2295.     /* set up speedup loops */
  2296.     install_mem_read_handler(0, TOBYTE(0x01071dc0), TOBYTE(0x01071ddf), strkforc_speedup_r);
  2297.     wms_protect_s = 0xffe4c100;
  2298.     wms_protect_d = 0xffe4c1d0;
  2299.  
  2300.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x1000000));
  2301.     wms_autoerase_reset = 0;
  2302.  
  2303.     /* expand the sound ROMs */
  2304.     memcpy(&memory_region(REGION_CPU2)[0x20000], &memory_region(REGION_CPU2)[0x10000], 0x10000);
  2305.     memcpy(&memory_region(REGION_CPU2)[0x40000], &memory_region(REGION_CPU2)[0x30000], 0x10000);
  2306.     memcpy(&memory_region(REGION_CPU2)[0x60000], &memory_region(REGION_CPU2)[0x50000], 0x10000);
  2307.  
  2308.     /* This just causes the init_machine to copy the images again */
  2309.     wms_rom_loaded = 0;
  2310. }
  2311. void init_mk(void)
  2312. {
  2313.     /* set up speedup loops */
  2314.     install_mem_read_handler(0, TOBYTE(0x01053360), TOBYTE(0x0105337f), mk_speedup_r);
  2315.  
  2316.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x1000000));
  2317.     wms_autoerase_reset = 0;
  2318.  
  2319.     /* This just causes the init_machine to copy the images again */
  2320.     wms_rom_loaded = 0;
  2321. }
  2322. void init_mkla1(void)
  2323. {
  2324.     /* set up speedup loops */
  2325.     install_mem_read_handler(0, TOBYTE(0x0104f000), TOBYTE(0x0104f01f), mkla1_speedup_r);
  2326.     wms_protect_s = 0xffc96e20;
  2327.     wms_protect_d = 0xffc96ce0;
  2328.  
  2329.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x1000000));
  2330.     wms_autoerase_reset = 0;
  2331.  
  2332.     /* This just causes the init_machine to copy the images again */
  2333.     wms_rom_loaded = 0;
  2334. }
  2335. void init_mkla2(void)
  2336. {
  2337.     /* set up speedup loops */
  2338.     install_mem_read_handler(0, TOBYTE(0x0104f020), TOBYTE(0x0104f03f), mkla2_speedup_r);
  2339.     wms_protect_s = 0xffc96d00;
  2340.     wms_protect_d = 0xffc96bc0;
  2341.  
  2342.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x1000000));
  2343.     wms_autoerase_reset = 0;
  2344.  
  2345.     /* This just causes the init_machine to copy the images again */
  2346.     wms_rom_loaded = 0;
  2347. }
  2348. void init_mkla3(void)
  2349. {
  2350.     /* set up speedup loops */
  2351.     install_mem_read_handler(0, TOBYTE(0x0104f040), TOBYTE(0x0104f05f), mkla3_speedup_r);
  2352.     wms_protect_s = 0xffc98930;
  2353.     wms_protect_d = 0xffc987f0;
  2354.  
  2355.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x1000000));
  2356.     wms_autoerase_reset = 0;
  2357.  
  2358.     /* This just causes the init_machine to copy the images again */
  2359.     wms_rom_loaded = 0;
  2360. }
  2361. void init_mkla4(void)
  2362. {
  2363.     /* set up speedup loops */
  2364.     install_mem_read_handler(0, TOBYTE(0x0104f040), TOBYTE(0x0104f05f), mkla4_speedup_r);
  2365.     wms_protect_s = 0xffc989d0;
  2366.     wms_protect_d = 0xffc98890;
  2367.  
  2368.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x1000000));
  2369.     wms_autoerase_reset = 0;
  2370.  
  2371.     /* This just causes the init_machine to copy the images again */
  2372.     wms_rom_loaded = 0;
  2373. }
  2374. void init_term2(void)
  2375. {
  2376.     /* set up speedup loops */
  2377.     install_mem_read_handler(0, TOBYTE(0x010aa040), TOBYTE(0x010aa05f), term2_speedup_r);
  2378.     wms_protect_s = 0xffd64f30;
  2379.     wms_protect_d = 0xffd64de0;
  2380.  
  2381.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x1000000));
  2382.     wms_autoerase_reset = 0;
  2383.  
  2384.     /* This just causes the init_machine to copy the images again */
  2385.     wms_rom_loaded = 0;
  2386. }
  2387. void init_totcarn(void)
  2388. {
  2389.     /* set up speedup loops */
  2390.     install_mem_read_handler(0, TOBYTE(0x0107dde0), TOBYTE(0x0107ddff), totcarn_speedup_r);
  2391.     wms_protect_s = 0xffd1fd30;
  2392.     wms_protect_d = 0xffd1fbf0;
  2393.  
  2394.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x1000000));
  2395.     wms_autoerase_reset = 0;
  2396.  
  2397.     /* This just causes the init_machine to copy the images again */
  2398.     wms_rom_loaded = 0;
  2399. }
  2400. void init_totcarnp(void)
  2401. {
  2402.     /* set up speedup loops */
  2403.     install_mem_read_handler(0, TOBYTE(0x0107dde0), TOBYTE(0x0107ddff), totcarn_speedup_r);
  2404.     wms_protect_s = 0xffd1edd0;
  2405.     wms_protect_d = 0xffd1ec90;
  2406.  
  2407.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x1000000));
  2408.     wms_autoerase_reset = 0;
  2409.  
  2410.     /* This just causes the init_machine to copy the images again */
  2411.     wms_rom_loaded = 0;
  2412. }
  2413. void init_mk2(void)
  2414. {
  2415.     /* set up speedup loops */
  2416.     install_mem_read_handler(0, TOBYTE(0x01068e60), TOBYTE(0x01068e7f), mk2_speedup_r);
  2417.  
  2418.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x1000000));
  2419.     wms_autoerase_reset = 0;
  2420.  
  2421.     cpu_bankbase[7] = &(GFX_ROM[0x800000]);
  2422.     install_mem_read_handler(0, TOBYTE(0x04000000), TOBYTE(0x05ffffff), MRA_BANK7);
  2423.  
  2424.     /* This just causes the init_machine to copy the images again */
  2425.     wms_rom_loaded = 0;
  2426. }
  2427. void init_mk2r14(void)
  2428. {
  2429.     /* set up speedup loops */
  2430.     install_mem_read_handler(0, TOBYTE(0x01068de0), TOBYTE(0x01068dff), mk2r14_speedup_r);
  2431.  
  2432.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x1000000));
  2433.     wms_autoerase_reset = 0;
  2434.  
  2435.     cpu_bankbase[7] = &(GFX_ROM[0x800000]);
  2436.     install_mem_read_handler(0, TOBYTE(0x04000000), TOBYTE(0x05ffffff), MRA_BANK7);
  2437.  
  2438.     /* This just causes the init_machine to copy the images again */
  2439.     wms_rom_loaded = 0;
  2440. }
  2441. void init_nbajam(void)
  2442. {
  2443.     /* set up speedup loops */
  2444.     install_mem_read_handler(0, TOBYTE(0x010754c0), TOBYTE(0x010754df), nbajam_speedup_r);
  2445.  
  2446.     TMS34010_set_stack_base(0, SCRATCH_RAM, TOBYTE(0x1000000));
  2447.     wms_autoerase_reset = 0;
  2448.  
  2449.     install_mem_read_handler(0, TOBYTE(0x04000000), TOBYTE(0x05ffffff), MRA_BANK8);
  2450.  
  2451.     /* This just causes the init_machine to copy the images again */
  2452.     wms_rom_loaded = 0;
  2453. }
  2454.  
  2455. /* init_machine functions */
  2456.  
  2457. void narc_init_machine(void)
  2458. {
  2459.     /*
  2460.      * Z-Unit
  2461.      *
  2462.      * music board is 6809 driving YM2151, DAC
  2463.      * effect board is 6809 driving CVSD, DAC
  2464.      *
  2465.      */
  2466.  
  2467.     /* set up ROMs */
  2468.     if (!wms_rom_loaded)
  2469.     {
  2470.         wms_load_code_roms();
  2471.         load_gfx_roms_8bit();
  2472.         wms_rom_loaded = 1;
  2473.     }
  2474.  
  2475.     /* set up palette */
  2476.     init_8bit();
  2477.  
  2478.     /* get rid of unmapped access errors during tests */
  2479.     remove_access_errors();
  2480.  
  2481.     /* set up sound board */
  2482.     williams_narc_init(1);
  2483.     install_mem_write_handler(0, TOBYTE(0x01e00000), TOBYTE(0x01e0001f), narc_sound_w);
  2484.  
  2485.     /* special input handler */
  2486.     install_mem_read_handler(0, TOBYTE(0x01c00000), TOBYTE(0x01c0005f), narc_input_r );
  2487.  
  2488.     install_mem_read_handler(0, TOBYTE(0x09afffc0), TOBYTE(0x09afffff), narc_unknown_r); /* bug? */
  2489.     install_mem_read_handler(0, TOBYTE(0x38383900), TOBYTE(0x383839ff), narc_unknown_r); /* bug? */
  2490. }
  2491. void smashtv_init_machine(void)
  2492. {
  2493.     /*
  2494.      * Y-Unit
  2495.      *
  2496.      * sound board is 6809 driving YM2151, DAC, and CVSD
  2497.      *
  2498.      */
  2499.  
  2500.     /* set up ROMs */
  2501.     if (!wms_rom_loaded)
  2502.     {
  2503.         wms_load_code_roms();
  2504.         load_gfx_roms_6bit();
  2505.         wms_rom_loaded = 1;
  2506.     }
  2507.  
  2508.     /* set up palette */
  2509.     init_6bit();
  2510.  
  2511.     /* get rid of unmapped access errors during tests */
  2512.     remove_access_errors();
  2513.  
  2514.     /* set up sound board */
  2515.     pia_unconfig();
  2516.     williams_cvsd_init(1, 0);
  2517.     pia_reset();
  2518.     install_mem_write_handler(0, TOBYTE(0x01e00000), TOBYTE(0x01e0001f), cvsd_sound_w);
  2519. }
  2520. void mk_init_machine(void)
  2521. {
  2522.     /*
  2523.      * Y-Unit
  2524.      *
  2525.      * sound board is 6809 driving YM2151, DAC, and OKIM6295
  2526.      *
  2527.      */
  2528.  
  2529.     /* set up ROMs */
  2530.     if (!wms_rom_loaded)
  2531.     {
  2532.         wms_load_code_roms();
  2533.         load_gfx_roms_6bit();
  2534.         load_adpcm_roms_512k();
  2535.         wms_rom_loaded = 1;
  2536.     }
  2537.  
  2538.     /* set up palette */
  2539.     init_6bit();
  2540.  
  2541.     /* get rid of unmapped access errors during tests */
  2542.     remove_access_errors();
  2543.  
  2544.     /* set up sound board */
  2545.     williams_adpcm_init(1);
  2546.     install_mem_write_handler(0, TOBYTE(0x01e00000), TOBYTE(0x01e0001f), adpcm_sound_w);
  2547. }
  2548. void term2_init_machine(void)
  2549. {
  2550.     /*
  2551.      * Y-Unit
  2552.      *
  2553.      * same as Mortal Kombat, but with the gun controllers
  2554.      *
  2555.      */
  2556.  
  2557.     mk_init_machine();
  2558.  
  2559.     /* special input handler */
  2560.     install_mem_read_handler(0, TOBYTE(0x01c00000), TOBYTE(0x01c0005f), term2_input_r );
  2561.     install_mem_read_handler(0, TOBYTE(0x01600020), TOBYTE(0x0160005f), term2_input_lo_r ); /* ??? */
  2562.  
  2563.     install_mem_write_handler(0, TOBYTE(0x01e00000), TOBYTE(0x01e0001f), term2_sound_w);
  2564. }
  2565. void trog_init_machine(void)
  2566. {
  2567.     /*
  2568.      * Y-Unit
  2569.      *
  2570.      * sound board is 6809 driving YM2151, DAC, and OKIM6295
  2571.      *
  2572.      */
  2573.  
  2574.     /* set up ROMs */
  2575.     if (!wms_rom_loaded)
  2576.     {
  2577.         wms_load_code_roms();
  2578.         load_gfx_roms_4bit();
  2579.         wms_rom_loaded = 1;
  2580.     }
  2581.  
  2582.     /* set up palette */
  2583.     init_4bit();
  2584.  
  2585.     /* get rid of unmapped access errors during tests */
  2586.     remove_access_errors();
  2587.  
  2588.     /* set up sound board */
  2589.     pia_unconfig();
  2590.     williams_cvsd_init(1, 0);
  2591.     pia_reset();
  2592.     /* fix sound (hack) */
  2593.     install_mem_write_handler(0, TOBYTE(0x01e00000), TOBYTE(0x01e0001f), cvsd_sound_w);
  2594. }
  2595. void mk2_init_machine(void)
  2596. {
  2597.     if (!wms_rom_loaded)
  2598.     {
  2599.         wms_load_code_roms();
  2600.         load_gfx_roms_8bit();
  2601.         wms_rom_loaded = 1;
  2602.         gfxrombackup = GFX_ROM;
  2603.     }
  2604.  
  2605.     /* set up palette */
  2606.     init_8bit_t();
  2607.  
  2608.     /*for (i=0;i<256;i++)
  2609.     {
  2610.         for (j=0;j<256;j++)
  2611.         {
  2612.             wms_conv_table[(i<<8)+j] = ((i&0x1f)<<8) | j;
  2613.         }
  2614.     }*/
  2615.     wms_videoram_size = 0x80000*2;
  2616. }
  2617. void nbajam_init_machine(void)
  2618. {
  2619.     if (!wms_rom_loaded)
  2620.     {
  2621.         wms_load_code_roms();
  2622.         load_gfx_roms_8bit();
  2623.         wms_rom_loaded = 1;
  2624.         gfxrombackup = GFX_ROM;
  2625.     }
  2626.  
  2627.     /* set up palette */
  2628.     init_8bit_t();
  2629.  
  2630.     /*for (i=0;i<256;i++)
  2631.     {
  2632.         for (j=0;j<256;j++)
  2633.         {
  2634.             wms_conv_table[(i<<8)+j] = ((i&0x1f)<<8) | j;
  2635.         }
  2636.     }*/
  2637.     wms_videoram_size = 0x80000*2;
  2638.  
  2639.     /* set up sound board */
  2640.     williams_adpcm_init(1);
  2641.     install_mem_write_handler(0, TOBYTE(0x01d01020), TOBYTE(0x01d0103f), adpcm_sound_w);
  2642. }
  2643.  
  2644. static WRITE_HANDLER( cvsd_sound_w )
  2645. {
  2646.     logerror("CPU #0 PC %08x: ", cpu_get_pc());
  2647.     logerror("sound write %x\n", data);
  2648.     williams_cvsd_data_w(0, (data & 0xff) | ((data & 0x200) >> 1));
  2649. }
  2650.  
  2651. static WRITE_HANDLER( adpcm_sound_w )
  2652. {
  2653. /*    logerror("CPU #0 PC %08x: ", cpu_get_pc()); */
  2654. /*    logerror("sound write %x\n", data); */
  2655.     williams_adpcm_data_w(0, data);
  2656. }
  2657.  
  2658. static WRITE_HANDLER( narc_sound_w )
  2659. {
  2660. /*    logerror("CPU #0 PC %08x: ", cpu_get_pc()); */
  2661. /*    logerror("sound write %x\n", data); */
  2662.     williams_narc_data_w(0, data);
  2663. }
  2664.  
  2665.